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Universidad de la República Uruguay: Montevideo, Montevideo, UY

Professor (Instituto de Ingeniería Eléctrica, Facultad de Ingeniería)
Employment
Source: Self-asserted source
Juan Oliver

Works (30)

Optimizing the Performance of the Sparse Matrix–Vector Multiplication Kernel in FPGA Guided by the Roofline Model

Micromachines
2023-10-31 | Journal article
DOI: 10.3390/mi14112030
Contributors: Federico Favaro; Ernesto Dufrechou; Juan P. Oliver; Pablo Ezzatti
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Wireless EEG System Achieving High Throughput and Reduced Energy Consumption Through Lossless and Near-Lossless Compression

IEEE Transactions on Biomedical Circuits and Systems
2018-02 | Journal article
DOI: 10.1109/TBCAS.2017.2779324
Contributors: Guillermo Dufort y Alvarez; Federico Favaro; Federico Lecumberry; Alvaro Martin; Juan P. Oliver; Julian Oreggioni; Ignacio Ramirez; Gadiel Seroussi; Leonardo Steinfeld
Source: check_circle
Crossref

A Low Cost System for Self Measurements of Power Consumption in Field Programmable Gate Arrays

Journal of Low Power Electronics
2017 | Journal article
Source: Self-asserted source
Juan Oliver

Wearable EEG via lossless compression

Engineering in Medicine and Biology Society (EMBC), 2016 IEEE 38th Annual International Conference of the
2016 | Conference paper
Source: Self-asserted source
Juan Oliver

Power estimations vs. power measurements in Spartan-6 devices

Programmable Logic (SPL), 2014 IX Southern Conference on
2014 | Conference paper
Source: Self-asserted source
Juan Oliver

Self-reconfigurable constant multiplier for FPGA

ACM Transactions on Reconfigurable Technology and Systems (TRETS)
2013 | Journal article
Source: Self-asserted source
Juan Oliver

Tracking the pipelining-power rule along the fpga technical literature

Proceedings of the 10th FPGAworld Conference
2013 | Conference paper
Source: Self-asserted source
Juan Oliver

A soft-core based lab for an introductory microprocessors course

Technologies Applied to Electronics Teaching (TAEE), 2012
2012 | Conference paper
Source: Self-asserted source
Juan Oliver

Clock gating and clock enable for FPGA power reduction

Programmable Logic (SPL), 2012 VIII Southern Conference on
2012 | Conference paper
Source: Self-asserted source
Juan Oliver

Power estimations vs. power measurements in Cyclone III devices

Programmable Logic (SPL), 2011 VII Southern Conference on
2011 | Conference paper
Source: Self-asserted source
Juan Oliver

Diseño de placas con lógica programable como experiencia educativa en cursos de grado

2009 | Journal article
Source: Self-asserted source
Juan Oliver

Lab at home: Hardware kits for a digital design lab

IEEE Transactions on Education
2009 | Journal article
Source: Self-asserted source
Juan Oliver

Reconfigurable architecture for binary images invariant moment extraction

Programmable Logic, 2009. SPL. 5th Southern Conference on
2009 | Conference paper
Source: Self-asserted source
Juan Oliver

Diseño Digital Utilizando Lógica Programable: Aplicaciones a la Enseñanza

2007 | Journal article
Source: Self-asserted source
Juan Oliver

Laboratorios en casa: Una nueva alternativa para cursos masivos de diseño lógico digital

Técnoloǵıas Aplicadas a la Enseñanza de la Electrónica
2006 | Journal article
Source: Self-asserted source
Juan Oliver

Laboratory at home: Actual circuit design and testing experiences in massive digital design courses

International Conference on Engineering Education (ICEE)
2006 | Conference paper
Source: Self-asserted source
Juan Oliver

Hardware lab at home possible with ultra low cost boards [logic design course]

Microelectronic Systems Education, 2005.(MSE'05). Proceedings. 2005 IEEE International Conference on
2005 | Conference paper
Source: Self-asserted source
Juan Oliver

IIE-PCI

2003 | Journal article
Source: Self-asserted source
Juan Oliver

Utilización de FPGAs como aceleradores de cálculo

VII Workshop Iberchip
2001 | Conference paper
Source: Self-asserted source
Juan Oliver

Śıntesis hardware de redes ALN para aplicaciones en control

Reunión de Trabajo en Procesamiento de la Información
1999 | Journal article
Source: Self-asserted source
Juan Oliver

Implementation of Adaptive Logic Networks on an FPGA board

Photonics East (ISAM, VVDC, IEMB)
1998 | Conference paper
Source: Self-asserted source
Juan Oliver

SIMENERG: The Design of Autonomous Systems

World Renewable Energy Congress
1996 | Conference paper
Source: Self-asserted source
Juan Oliver

Tools for design and evaluation of photovoltaic systems

III Congreso Internacional Enerǵıa, Ambiente e Innovación Tecnológica
1995 | Conference paper
Source: Self-asserted source
Juan Oliver

Diseño y construcción de un registrador de velocidad y dirección de viento para la evaluación del potencial eólico

1993 | Journal article
Source: Self-asserted source
Juan Oliver

Laboratorios en casa: una nueva alternativa para cursos masivos de diseño lógico digital

1970 | Journal article
Source: Self-asserted source
Juan Oliver

Ambiente de Desarrollo para el Diseño de Coprocesadores en Arquitectura Sparc V8-LEON2

Journal article
Source: Self-asserted source
Juan Oliver

Desarrollo de un equipo para grabar los sonidos de los bovinos a la intemperie

Journal article
Source: Self-asserted source
Juan Oliver

Diseño Hardware en Uruguay: Una alternativa económica y técnicamente viable

Journal article
Source: Self-asserted source
Juan Oliver

MOSOBO in CIARP 2011

Journal article
Source: Self-asserted source
Juan Oliver

PLACA IIE-CYCLONE

Journal article
Source: Self-asserted source
Juan Oliver

Peer review (1 review for 1 publication/grant)

Review activity for Journal of electronic testing. (1)
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