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Employment (1)

CEA LIST: Palaiseau, Essonne , FR

2021-12-15 to present | Research Engineer
Employment
Source: Self-asserted source
0000-0002-0844-8198

Works (3)

Generating Efficient FPGA-based CNN Accelerators from High-Level Descriptions

Journal of Signal Processing Systems
2022-10 | Journal article
DOI: 10.1007/s11265-022-01797-w
Contributors: Nermine Ali; Jean-Marc Philippe; Benoit Tain; Philippe Coussy
Source: check_circle
Crossref

Exploration and Generation of Efficient FPGA-based Deep Neural Network Accelerators

2021 IEEE Workshop on Signal Processing Systems (SiPS)
2021-10 | Conference paper
DOI: 10.1109/sips52927.2021.00030
Source: Self-asserted source
0000-0002-0844-8198

Deep Neural Networks Characterization Framework for Efficient Implementation on Embedded Systems

2020 IEEE Workshop on Signal Processing Systems (SiPS)
2020-10 | Conference paper
DOI: 10.1109/sips50750.2020.9195227
Source: Self-asserted source
0000-0002-0844-8198
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