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CMOS devices, Electrothermal modeling, System level thermal modeling
India, Belgium

Activities

Works (11)

Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2023 | Journal article
Contributors: Sankatali Venkateswarlu; Subrat Mishra; Herman Oprins; Bjorn Vermeersch; Moritz Brunion; Jun-Han Han; Mircea R. Stan; Dwaipayan Biswas; Pieter Weckx; Francky Catthoor
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Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs)

IEEE International Reliability Physics Symposium (IRPS)
2023 | Conference paper
Contributors: Mishra, S.; Sankatali, V.; Vermeersch, B.; Brunion, M.; Lofrano, M.; Abdi, D.; Oprins, H.; Biswas, D.; Zografos, O.; Hiblot, G. et al.
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Thermal Performance Analysis of Mempool RISC-V Multicore SoC

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2022-11 | Journal article
Contributors: Sankatali Venkateswarlu; Subrat Mishra; Herman Oprins; Bjorn Vermeersch; Moritz Brunion; Jun-Han Han; Mircea R. Stan; Pieter Weckx; Francky Catthoor
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Electro-Thermal Performance Boosting in Stacked Si Gate-all-Around Nanosheet FET With Engineered Source/Drain Contacts

IEEE Transactions on Electron Devices
2021-09 | Journal article
Contributors: Sankatali Venkateswarlu; Oves Badami; Kaushik Nayak
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Device SHEs in the Presence of Non-equilibrium Channel Heat Transport in SOI and SOD FinFETs with Technology Scaling

2020 5th IEEE International Conference on Emerging Electronics, ICEE 2020
2020 | Conference paper
EID:

2-s2.0-85131838698

Contributors: Venkateswarlu, S.; Nayak, K.
Source: Self-asserted source
Sankatali Venkateswarlu via Scopus - Elsevier
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Superior Work Function Variability Performance of Horizontally Stacked Nanosheet FETs for Sub-7-nm Technology and beyond

4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Proceedings
2020 | Conference paper
EID:

2-s2.0-85091977448

Contributors: Sudarsanan, A.; Venkateswarlu, S.; Nayak, K.
Source: Self-asserted source
Sankatali Venkateswarlu via Scopus - Elsevier
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THz Device Design for SiGe HBT under Sub-room Temperature to Cryogenic Conditions

2020 5th IEEE International Conference on Emerging Electronics, ICEE 2020
2020 | Conference paper
EID:

2-s2.0-85131830003

Contributors: Gupta, D.; Venkateswarlu, S.; Badami, O.; Nayak, K.
Source: Self-asserted source
Sankatali Venkateswarlu via Scopus - Elsevier
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Hetero-Interfacial Thermal Resistance Effects on Device Performance of Stacked Gate-All-Around Nanosheet FET

IEEE Transactions on Electron Devices
2020-10 | Journal article
Contributors: Sankatali Venkateswarlu; Kaushik Nayak
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Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si CMOS Logic Circuit Performance in N-14 to N-7 Scaled Technologies

IEEE Transactions on Electron Devices
2020-04 | Journal article
Contributors: Sankatali Venkateswarlu; Kaushik Nayak
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Impact of Fin Line Edge Roughness and Metal Gate Granularity on Variability of 10-nm Node SOI n-FinFET

IEEE Transactions on Electron Devices
2019-11 | Journal article
Contributors: Akhil Sudarsanan; Sankatali Venkateswarlu; Kaushik Nayak
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Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si n-FinFET Performance

IEEE Transactions on Electron Devices
2018-07 | Journal article
Contributors: Sankatali Venkateswarlu; Akhil Sudarsanan; Shiv Govind Singh; Kaushik Nayak
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Peer review (7 reviews for 2 publications/grants)

Review activity for IEEE electron device letters : (3)
Review activity for IEEE transactions on electron devices. (4)