Personal information

Other IDs

Scopus Author ID: 55148035200

Biography

Dr. U. Saravanakumar graduated in Electronics and Communication Engineering, from Anna University in 2006. In the year 2008, he received his Master’s degree in VLSI Design from Anna University, Chennai. He received his Doctoral Degree in the Faculty of Information and Communication Engineering specialized in the VLSI Design and On Chip Communication from Anna University in 2014. His research interests are in the field of VLSI Design, Reconfigurable Computing, System on Chip and Silicon Photonics. He worked in various institutions designated in various positions. At present he is working as Professor and Head of ECE at Muthayammal Engineering College, Rasipuram India. He is the Senior member of IEEE, Fellow of IETE and Member of IE(India).

Activities

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Employment (4)

Muthayammal Engineering College: Rasipuram, Tamil Nadu, IN

2019-06-03 to present | Professor and Head (Electronics and Communication Engineering)
Employment
Source: Self-asserted source
SARAVANAKUMAR U

Vel Tech Dr. RR & Dr. SR Technical University: Chennai, Tamil Nadu, IN

2016-07-15 to 2019-05-27 | Associate Professor (Electronics and Communication Engineering)
Employment
Source: Self-asserted source
SARAVANAKUMAR U

PSG College of Technology: Coimbatore, Tamil Nadu, IN

2009-10-07 to 2016-07-13 | Assistant Professor (Electronics and Communication Engineering)
Employment
Source: Self-asserted source
SARAVANAKUMAR U

Sri Ramakrishna Engineering College: Coimbatore, Tamil Nadu, IN

2008-06-09 to 2009-10-05 | Lecturer (Electronics and Communication Engineering)
Employment
Source: Self-asserted source
SARAVANAKUMAR U

Education and qualifications (3)

Anna University Chennai: Chennai, TN, IN

2009-03-14 to 2014-06-23 | Ph.D., (Information and Communication Engineering)
Education
Source: Self-asserted source
SARAVANAKUMAR U

Anna University Chennai: Chennai, TN, IN

2006-08-04 to 2008-06-21 | M.E., (VLSI Design)
Education
Source: Self-asserted source
SARAVANAKUMAR U

Anna University Chennai: Chennai, TN, IN

2002-07-09 to 2006-04-18 | B.E., (Electronics and Communication Engineering)
Education
Source: Self-asserted source
SARAVANAKUMAR U

Professional activities (3)

Institution of Engineers India: Kolkata, West Bengal, IN

2018-11 to present | Member
Membership
Source: Self-asserted source
SARAVANAKUMAR U

IEEE: New York, NY, UM

2015-12 to present | Member
Membership
Source: Self-asserted source
SARAVANAKUMAR U

International Association of Engineers: Hong Kong, Hong Kong, CN

2014-09 to present | Member
Membership
Source: Self-asserted source
SARAVANAKUMAR U

Funding (1)

FPGA Based Data Acquisition System for Environmental Monitoring

2017-12 to present | Grant
Vel Tech (Chennai, Tamilnadu, IN)
Source: Self-asserted source
SARAVANAKUMAR U

Works (18)

Investigation of the one-step electrochemical deposition of graphene oxide-doped poly(3,4-ethylenedioxythiophene)–polyphenol oxidase as a dopamine sensor

RSC Advances
2022 | Journal article
DOI: 10.1039/d2ra00791f
Part of ISSN: 2046-2069
Source: Self-asserted source
SARAVANAKUMAR U

A Triple band microstrip slot Antenna for S band &C band Applications

2021 International Conference on Computational Performance Evaluation (ComPE)
2021-12-01 | Conference paper
DOI: 10.1109/compe53109.2021.9751980
Source: Self-asserted source
SARAVANAKUMAR U

Artificial Intelligence (AI) Prediction of Atari Game Strategy by using Reinforcement Learning Algorithms

2021 International Conference on Computational Performance Evaluation (ComPE)
2021-12-01 | Conference paper
DOI: 10.1109/compe53109.2021.9752304
Source: Self-asserted source
SARAVANAKUMAR U

Image Processing Methods for Face Recognition using Machine Learning Techniques

2021 International Conference on Computational Performance Evaluation (ComPE)
2021-12-01 | Conference paper
DOI: 10.1109/compe53109.2021.9752410
Source: Self-asserted source
SARAVANAKUMAR U

A Multiband Triangular Slot Array based Microstrip Patch Antenna for C & X-Band Applications

2021 Second International Conference on Electronics and Sustainable Communication Systems (ICESC)
2021-08-04 | Conference paper
DOI: 10.1109/icesc51422.2021.9532840
Source: Self-asserted source
SARAVANAKUMAR U

Via's based parametric Analysis of SIW Antenna for Multiband Performance

2021 Second International Conference on Electronics and Sustainable Communication Systems (ICESC)
2021-08-04 | Conference paper
DOI: 10.1109/icesc51422.2021.9532942
Source: Self-asserted source
SARAVANAKUMAR U

Low-Power High-Speed Hybrid Multiplier Architectures for Image Processing Applications

Proceedings of the International Conference on ISMAC in Computational Vision and Bio-Engineering 2018 (ISMAC-CVB)
2019 | Other
DOI: 10.1007/978-3-030-00665-5_54
Part of ISBN: 9783030006648
Part of ISSN: 2212-9391
Contributors: U. Saravanakumar; P. Suresh; V. Karthikeyan
Source: Self-asserted source
SARAVANAKUMAR U via Crossref Metadata Search

A CAN Protocol Based Driver Assistance System for Safety Manner

International Conference on Intelligent Data Communication Technologies and Internet of Things (ICICI) 2018
2018 | Other
DOI: 10.1007/978-3-030-03146-6_32
Part of ISBN: 9783030031459
Part of ISSN: 2367-4512
Contributors: Rahul Vasant Nale; Shubham Srivastava; Aditya Kumar Sinha; U. Saravanakumar
Source: Self-asserted source
SARAVANAKUMAR U via Crossref Metadata Search

Accelerating of Nano particles in the focal region through tightly focused cylindrical vector beam

Optics InfoBase Conference Papers
2018 | Conference paper
DOI: 10.1364/LAOP.2018.Th3D.5
EID:

2-s2.0-85059462923
Contributors: Suresh, P.; Saravanakumar, U.; Karthikeyan, V.; Revathi, M.
Source: Self-asserted source
SARAVANAKUMAR U via Scopus - Elsevier

Low-power, low-latency transceiver design using d-TGMS flip-flop for on-chip interconnects

International Journal of Engineering and Technology
2018-01-20 | Journal article
Source: Self-asserted source
SARAVANAKUMAR U

SOA Based All-Optical N-Bit-Binary Data Multiplier Design

Journal of Nanomedicine and Nanoscience Research
2017-07-27 | Journal article
Source: Self-asserted source
SARAVANAKUMAR U

Simulation and analysis of multicast routing algorithm for 2-D mesh network on chip

Asian Journal of Scientific Research
2013 | Journal article
DOI: 10.3923/ajsr.2013.754.762
EID:

2-s2.0-84881517006
Contributors: Saravanakumar, U.; Rangarajan, R.
Source: Self-asserted source
SARAVANAKUMAR U via Scopus - Elsevier

Cluster Based Hierarchical Routing Algorithm for Network on Chip

2013-08-30 | Journal article
DOI:

10.4236/cs.2013.45053
Source: Self-asserted source
SARAVANAKUMAR U

Energy and throughput analysis of multicast routing algorithm for 2D mesh network on chip

Procedia Engineering
2012 | Conference paper
DOI: 10.1016/j.proeng.2012.01.845
EID:

2-s2.0-84859021857
Contributors: Saravanakumar, U.; Rangarajan, R.
Source: Self-asserted source
SARAVANAKUMAR U via Scopus - Elsevier

DESIGN AND PERFORMANCE EVALUATION OF ON CHIP NETWORK ROUTERS

Journal article | Author
Contributors: SARAVANAKUMAR U
Source: Self-asserted source
SARAVANAKUMAR U

Energy and Throughput Analysis of Multicast Routing Algorithm for 2D Mesh Network on Chip

Journal article
Source: Self-asserted source
SARAVANAKUMAR U

HARDWARE IMPLEMENTATION OF PIPELINE BASED ROUTER DESIGN FOR ONCHIP NETWORK

Journal article
Source: Self-asserted source
SARAVANAKUMAR U

implementation of scheduling algorithms for on chip communication

Journal article
Source: Self-asserted source
SARAVANAKUMAR U
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