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Scopus Author ID: 57191589776

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Employment (2)

Tokyo Institute of Technology: Tokyo, JP

2019-04-01 to present | PhD Student (Electrical and Electronic Engineering)
Employment
Source: Self-asserted source
Waleed Madany

Apple Japan: Tokyo, Japan, JP

2023-04-01 to 2023-09-30 | DMS Intern (DMS (Digital-Mixed Signal Verification Team))
Employment
Source: Self-asserted source
Waleed Madany

Education and qualifications (2)

Tokyo Institute of Technology: Tokyo, Japan, JP

2019-04-01 to 2024-09-01 | PhD Course (Electrical and Electronics Engineering)
Education
Source: Self-asserted source
Waleed Madany

Aswan University: Aswan, Aswan, EG

2014-03-05 to 2019 | Lecturer Assistant (Electrical Engineering)
Qualification
Source: Self-asserted source
Waleed Madany

Works (12)

A 0.8–1.4-GHz Synthesizable DPLL Using a Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation

IEEE Access
2025 | Journal article
DOI: 10.1109/ACCESS.2025.3547366
Contributors: Waleed Madany; Yuncheng Zhang; Ashbir Aviat Fadila; Hongye Huang; Junjun Qiu; Jill Mayeda; Atsushi Shirane; Kenichi Okada
Source: check_circle
Crossref

A Fully Synthesizable Fractional-N MDLL With Energy-Efficient Ring-Oscillator-Based DTC of Large Tuning Range

IEEE Solid-State Circuits Letters
2024 | Journal article
DOI: 10.1109/LSSC.2024.3352736
Contributors: Hóngyè Huáng; Bangan Liu; Zezheng Liu; Dingxin Xu; Yuncheng Zhang; Waleed Madany; Junjun Qiu; Zheng Sun; Ashbir Aviat Fadila; Jian Pang et al.
Source: check_circle
Crossref

A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta–Sigma Modulator and Hybrid FIR Filter

IEEE Journal of Solid-State Circuits
2024 | Journal article
DOI: 10.1109/JSSC.2023.3349002
Contributors: Yuncheng Zhang; Zheng Sun; Bangan Liu; Junjun Qiu; Dingxin Xu; Yi Zhang; Xi Fu; Dongwon You; Hongye Huang; Waleed Madany et al.
Source: check_circle
Crossref

A synthesizable spread spectrum clock generator based on type-II/III fractional-<i>N</i> DPLL

IEICE Electronics Express
2024-11-25 | Journal article
DOI: 10.1587/elex.21.20240500
Contributors: Waleed Madany; Hòngyé Huáng; Bangan Liu; Ashbir Aviat Fadila; Zezheng Liu; Wenqian Wang; Junjun Qiu; Jill Mayeda; Atsushi Shirane; Kenichi Okada
Source: check_circle
Crossref

A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path

ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)
2023-09-11 | Conference paper
DOI: 10.1109/esscirc59616.2023.10268737
Contributors: Waleed Madany; Yuncheng Zhang; Ashbir Aviat Fadila; Hongye Huang; Junjun Qiu; Atsushi Shirane; Kenichi Okada
Source: Self-asserted source
Waleed Madany

A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlter

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
2023-06-11 | Conference paper
DOI: 10.23919/vlsitechnologyandcir57934.2023.10185368
Contributors: Yuncheng Zhang; Zheng Sun; Bangan Liu; Junjun Qiu; Dingxin Xu; Yi Zhang; Xi Fu; Dongwon You; Hongye Huang; Waleed Madany et al.
Source: Self-asserted source
Waleed Madany

A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference

2023 IEEE Custom Integrated Circuits Conference (CICC)
2023-04 | Conference paper
DOI: 10.1109/cicc57935.2023.10121180
Contributors: Dingxin Xu; Yuncheng Zhang; Hongye Huang; Zheng Sun; Bangan Liu; Ashbir Aviat Fadila; Junjun Qiu; Zezheng Liu; Wenqian Wang; Yuang Xiong et al.
Source: Self-asserted source
Waleed Madany

A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain-Boosted PD and Loop-Gain Calibration

2023 IEEE International Solid- State Circuits Conference (ISSCC)
2023-02-19 | Conference paper
DOI: 10.1109/isscc42615.2023.10067516
Contributors: Junjun Qiu; Wenqian Wang; Zheng Sun; Bangan Liu; Yuncheng Zhang; Dingxin Xu; Hongye Huang; Ashbir Aviat Fadila; Zezheng Liu; Waleed Madany et al.
Source: Self-asserted source
Waleed Madany

Adaptive timing correction technique for pulse-amplitude and pulse-position modulation interface

International Journal of Electronics
2019-12-02 | Journal article
DOI: 10.1080/00207217.2019.1636298
Part of ISSN: 0020-7217
Part of ISSN: 1362-3060
Contributors: Waleed Madany; Mostafa Rashdan; El-Sayed Hasaneen
Source: Self-asserted source
Waleed Madany

Serial data link interface for memory applications

Midwest Symposium on Circuits and Systems
2017 | Conference paper
DOI: 10.1109/MWSCAS.2016.7869993
EID:

2-s2.0-85015972998
Contributors: Madany, W.; Rashdan, M.; Hasaneen, E.-S.
Source: Self-asserted source
Waleed Madany via Scopus - Elsevier

Time-based recovery technique for pulse-position and pulse-amplitude modulation interface

Proceedings of the International Conference on Microelectronics, ICM
2017 | Conference paper
DOI: 10.1109/ICM.2016.7847869
EID:

2-s2.0-85014888615
Contributors: Madany, W.; Rashdan, M.; Hasaneen, E.-S.
Source: Self-asserted source
Waleed Madany via Scopus - Elsevier

Pulse-position and pulse-amplitude modulation interface for serial data link applications

Proceedings of the 2016 4th International Japan-Egypt Conference on Electronic, Communication and Computers, JEC-ECC 2016
2016 | Conference paper
DOI: 10.1109/JEC-ECC.2016.7518976
EID:

2-s2.0-84991744776
Contributors: Madany, W.; Rashdan, M.; Hasaneen, E.-S.
Source: Self-asserted source
Waleed Madany via Scopus - Elsevier
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