Stephen Furber (0000-0002-6524-3367)

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Steve Furber CBE FRS FREng is ICL Professor of Computer Engineering in the School of Computer Science at the University of Manchester, UK. After completing a BA in mathematics and a PhD in aerodynamics at the University of Cambridge, UK, he spent the 1980s at Acorn Computers, where he was a principal designer of the BBC Microcomputer and the ARM 32-bit RISC microprocessor. Over 60 billion variants of the ARM processor have since been manufactured, powering much of the world's mobile and embedded computing. He moved to the ICL Chair at Manchester in 1990 where he leads research into asynchronous and low-power systems and, more recently, neural systems engineering, where the SpiNNaker project is delivering a computer incorporating a million ARM processors optimised for brain modelling applications.

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The University of Manchester: Manchester, GB

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Stephen Furber

https://orcid.org/0000-0002-6524-3367

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The University of Manchester: Manchester, GB

The University of Manchester: Manchester, GB

Acorn Computers Ltd: Cambridge, GB

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University of Cambridge: Cambridge, Cambridgeshire, GB

Funding (20)

Continuous on-line adaptation in many-core systems: From graceful degradation to graceful amelioration

AnyScale Applications

Interconnection Networks: Practice unites with Theory (INPUT)

PRiME: Power-efficient, Reliable, Many-core Embedded systems

Biologically-Inspired Massively-Parallel Computation

PAMELA: a Panoramic Approach to the Many-CorE LAndsape - from end-user to end-device: a holistic game-changing approach

DOME: Delaying and Overcoming Microprocessor Errors

BABEL

eFuturesXD - crossing the boundaries

Globally Asynchronous Elastic Logic Synthesis (GAELS)

Manchester Centre for Doctoral Training in Computer Science

CICADA Cross-disciplinary Feasibility Account

VERification-Driven Asynchronous Design (VERDAD)

Biologically-Inspired Massively Parallel Architectures - computing beyond a million processors

PDP-squared: Meaningful PDP language models using parallel distributed processors.

Advanced Processor Technologies Platform Grant

The Manchester Centre for Interdisciplinary Computational and Dynamical Analysis (CICADA)

Meeting the design challenges of the nano-CMOS electronics

A scalable chip multiprocessor for large-scale neural simulation

Network : Developing a Common Vision for UK research in Microelectronic Design.

Works (50 of 237)

Focus on benchmarks for neuromorphic computing

FPGA-based fast bin-ratio spiking ensemble network for radioisotope identification

Digital neuromorphic technology: current and future prospects

The coming decade of digital brain research: A vision for neuroscience at the intersection of technology and computing

The coming decade of digital brain research: A vision for neuroscience at the intersection of technology and computing

Building Brains

A High-Throughput Low-Latency Interface Board for SpiNNaker-in-the-loop Real-Time Systems

Event driven bio-inspired attentive system for the iCub humanoid robot on SpiNNaker

A GPS-Less Localization and Mobility Modelling (LMM) System for Wildlife Tracking

spiNNlink: FPGA-Based Interconnect for the Million-Core SpiNNaker System

Nanoscale Room-Temperature Multilayer Skyrmionic Synapse for Deep Spiking Neural Networks

Stochastic rounding and reduced-precision fixed-point arithmetic for solving neural ordinary differential equations

Real-time cortical simulation on neuromorphic hardware

Efficient Reward-Based Structural Plasticity on a SpiNNaker 2 Prototype

Behavioral Learning in a Cognitive Neuromorphic Robot: An Integrative Approach

Parallel Distribution of an Inner Hair Cell and Auditory Nerve Model for Real-Time Application

Building a Spiking Neural Network Model of the Basal Ganglia on SpiNNaker

Spiking neural networks for computer vision

Visual attention and object naming in humanoid robots using a bio-inspired spiking neural network

Neuromodulated Synaptic Plasticity on the SpiNNaker Neuromorphic System

Live demonstration: Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems

Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems

Realising Turing’s dream

Using stochastic spiking neural networks on SpiNNaker to solve constraint satisfaction problems

SpiNNaker

On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems

Asynchronous Interface FIFO Design on FPGA for High-throughput NRZ Synchronisation

A fixed point exponential function accelerator for a neuromorphic many-core system

Dynamic voltage and frequency scaling for neuromorphic many-core systems

Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems

Identifying Energy Holes in Randomly Deployed Hierarchical Wireless Sensor Networks

Profiling a Many-core Neuromorphic Platform

Optimized Task Graph Mapping on a Many-core Neuromorphic Supercomputer

Parallel distribution of an inner hair cell and auditory nerve model for real-time application

A spiking neural network model of the Lateral Geniculate Nucleus on the SpiNNaker machine

Correction to ‘Microprocessors: the engines of the digital age’

Microprocessors: the engines of the digital age

PyDVS

Bio-inspired massively-parallel computation

The SpiNNaker project

High performance computing on SpiNNaker neuromorphic platform: A case study for energy efficient image processing