Ghader Yosefi (0000-0001-5991-5473)

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Biography

Ghader Yosefi was born in Piranshahr, Iran in 1980. He received his B.S. and M.S. degrees in Electrical Electronics Engineering from Urmia University, Urmia, Iran in 2002 and 2007, respectively. He also received his Ph.D. degree in Electrical Electronics Engineering in Islamic Azad University, Science and Research Branch, Tehran, Iran in 2014. His research interests are CMOS Analog and Digital integrated circuits, CMOS fuzzy logic controller chip, Data converters, RFIC design, MEMS Micropumps and Microsensors. He is currently with Electrical Electronics Engineering Department in Islamic Azad University, Mahabad, Iran.

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Islamic Azad University of Mahabad: Mahabad, IR

2005-09-01 to present | Assistant Professor (Electrical Electronics Engineering )

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Ghader Yosefi

https://orcid.org/0000-0001-5991-5473

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Islamic Azad University of Mahabad: Mahabad, IR

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Islamic Azad University of Mahabad: Mahabad, IR

Works (23)

A 125 GHz millimeter-wave phase lock loop with improved VCO and injection-locked frequency divider in 65 nm CMOS process

A 110–140 GHz Millimeter-Wave VCO Using Varactor and Bulk Effective Technique in 65 nm CMOS Process

An enhanced fast slew rate recycling folded cascode Op-Amp with general improvement in 180 nm CMOS process

An enhanced fast-settling recycling folded cascode Op-Amp with improved DC gain in 90 nm CMOS process

A special technique for Recycling Folded Cascode OTA to improve DC gain, bandwidth, CMRR and PSRR in 90 nm CMOS process

The high recycling folded cascode (HRFC): A general enhancement of the recycling folded cascode operational amplifier

Simulation of a CMOS RFC Operation Amplifier Circuit with New Results of DC Gain

New Programmable CMOS Fuzzifier and C2V Circuits Applicable in FLC Chip for Signal Processing of MEMS Glucose Sensors

Design and Analysis of a High Force, Low Voltage and High Flow Rate Electro-Thermal Micropump

Design of a mixed-signal digital CMOS fuzzy logic controller (FLC) chip using new current mode circuits

Generating of digital fuzzifier with high resolution, high speed and low area ADC

Continuous-valued logic &amp; its application in soft controlling

Design and implementation of a new fuzzy logic controller

Design of a new intelligent CMOS controller chip for control water level in tanks

Design of a new intelligent CMOS controller chip for control water level in tanks

Implementing of neuro-fuzzy system with high-speed, low-power CMOS circuits in current-mode

Implementing of neuro-fuzzy system with high-speed, low-power CMOS circuits in current-mode

New definition of membership function and its hardware implementation with a new strategy

Design of new CMOS current mode min and max circuits for FLC chip applications

Application of Adaptive Neuro Fuzzy Inference System (ANFIS) in implementing of new CMOS Fuzzy Logic Controller (FLC) chip

Design of a new CMOS controllable mixed-signal current mode fuzzy logic controller (FLC) chip

Implementation of a CMOS mixed-signal digital FLC chip using new fuzzifier and current mode A/D

A digital CMOS fuzzy logic controller chip using new fuzzifier and max circuit

An enhanced fast slew rate recycling folded cascode Op-Amp with general improvement in 180 nm CMOS process

Continuous-valued logic & its application in soft controlling