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Education and qualifications (3)

Instituto Politécnico Nacional: Ciudad de México, Ciudad de México, MX

2021-08-18 to present | Doctorado en Comunicaciones y Electrónica (Sección de Estudios de Posgrado e Investigación)
Qualification
Source: Self-asserted source
Esteban Ramse Anides Caballero

Instituto Politécnico Nacional: Mexico City, Ciudad de Mexico, MX

2019-07-13 to 2021-06-30 | Maestria en Ciencias de Ingeniería en Microelectronica (Sección de Estudios de Posgrado e Investigación)
Education
Source: Self-asserted source
Esteban Ramse Anides Caballero

Universidad Politecnica de Texcoco: Texcoco de Mora, Estado de Mexico, MX

2014-08-02 to 2018-01-10 | Licenciatura en Ingeniería en Electrónica y Telecomunicaciones
Education
Source: Self-asserted source
Esteban Ramse Anides Caballero

Works (7)

New High-Speed Arithmetic Circuits Based on Spiking Neural P Systems with Communication on Request Implemented in a Low-Area FPGA

Mathematics
2024-11-07 | Journal article
DOI: 10.3390/math12223472
Part of ISSN: 2227-7390
Contributors: Jose Luis Irepan Rangel Moreno; Esteban Anides; Eduardo Vazquez-Fernandez; Giovanny Sanchez; J. G. Avalos-Ochoa; Gonzalo Duchen; Linda K. Toscano
Source: Self-asserted source
Esteban Ramse Anides Caballero

A Novel PSO-Based Adaptive Filter Structure with Switching Selection Criteria for Active Noise Control

Applied Sciences
2022-04-26 | Journal article
DOI: 10.3390/app12094368
Part of ISSN: 2076-3417
Source: Self-asserted source
Esteban Ramse Anides Caballero

A Dual Adaptive Filter Spike-Based Hardware Architecture for Implementation of a New Active Noise Control Structure

Electronics
2021 | Journal article
Source: Self-asserted source
Esteban Ramse Anides Caballero

A low-cost and highly compact FPGA-based encryption/decryption architecture for AES algorithm

IEEE Latin America Transactions
2021 | Journal article
Source: Self-asserted source
Esteban Ramse Anides Caballero

High-performance and ultra-compact spike-based architecture for real-time acoustic echo cancellation

Applied Soft Computing
2021 | Journal article
DOI: https://doi.org/10.1016/j.asoc.2021.108037
Part of ISSN: 1568-4946
Source: Self-asserted source
Esteban Ramse Anides Caballero
grade
Preferred source (of 2)‎

Small universal spiking neural P systems with dendritic/axonal delays and dendritic trunk/feedback

Neural Networks
2021 | Journal article
Source: Self-asserted source
Esteban Ramse Anides Caballero

A low-cost and highly compact FPGA-based encryption/decryption architecture for AES algorithm

IEEE Latin America Transactions
2021-09 | Journal article
DOI: 10.1109/TLA.2021.9468436
Contributors: Christian Equihua; Esteban Anides; Jorge Luis García; Eduardo Vázquez; Gabriel Sánchez; Juan-Gerardo Avalos; Giovanny Sánchez
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