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Employment (1)

Feng Chia University: Taichung, TW

2000-09-01 to present | Professor (Electronics Engineering)
Employment
Source: Self-asserted source
Feng-Tso Chien

Education and qualifications (1)

National Central University: Chung-Li, TW

1996-09-01 to 2000-01-11 | Ph.D (Electric engineering)
Education
Source: Self-asserted source
Feng-Tso Chien

Works (5)

Thin-Film Transistors

Membranes
2022-04 | Journal article | Author
DOI: 10.3390/membranes12040411
Contributors: Feng-Tso Chien; Chang Yu-Wei; JO CHIN LIU
Source: check_circle
Multidisciplinary Digital Publishing Institute

Normally-Off p-GaN Gated AlGaN/GaN MIS-HEMTs with ALD-Grown Al<sub>2</sub>O<sub>3</sub>/AlN Composite Gate Insulator

Membranes
2021-09 | Journal article | Author
DOI: 10.3390/membranes11100727
Contributors: Hsien-Chin Chiu; Chia-Hao Liu; Chong-Rong Huang; Chi-Chuan Chiu; Hsiang-Chun Wang; Hsuan-ling Kao; Shinn-Yn Lin; Feng-Tso Chien
Source: check_circle
Multidisciplinary Digital Publishing Institute

Raised Source/Drain (RSD) and Vertical Lightly Doped Drain (LDD) Poly-Si Thin-Film Transistor

Membranes
2021-02 | Journal article | Author
DOI: 10.3390/membranes11020103
Contributors: Feng-Tso Chien; Jing Ye; Wei-Cheng Yen; Chii-Wen Chen; Cheng-Li Lin; Yao-Tsung Tsai
Source: check_circle
Multidisciplinary Digital Publishing Institute

High Threshold Voltage Normally off Ultra-Thin-Barrier GaN MISHEMT with MOCVD-Regrown Ohmics and Si-Rich LPCVD-SiNx Gate Insulator

Energies
2020-05 | Journal article | Author
DOI: 10.3390/en13102479
Contributors: Hsien-Chin Chiu; Hsien-Chin Chiu; Chong-Rong Huang; Hsuan-ling Kao; Feng-Tso Chien
Source: check_circle
Multidisciplinary Digital Publishing Institute

Double-Gate Two-Step Source/Drain Poly-Si Thin-Film Transistor

Coatings
2019-04 | Journal article | Author
DOI: 10.3390/coatings9040233
Contributors: Feng-Tso Chien; Chih-Ping Hung; Hsien-Chin Chiu; Tsung-Kuei Kang; Ching-Hwa Cheng; Yao-Tsung Tsai
Source: check_circle
Multidisciplinary Digital Publishing Institute
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