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Reconfigurable Computing, Compilers, Domain-Specific Languages, FPGAs
Portugal

Biography

João M. P. Cardoso received a 5-year Electronics Engineering degree from the University of Aveiro in 1993, and an MSc and a Ph.D. degree in Electrical and Computer Engineering from the IST/UTL (Technical University of Lisbon), Lisbon, Portugal in 1997 and 2001, respectively. He is currently a Full Professor at the Department of Informatics Engineering, Faculty of Engineering of the University of Porto, Porto, Portugal and a research member of INESC TEC. Before, he was with the IST/UTL (2006-2008), a senior researcher at INESC-ID (2001-2009), and with the University of Algarve (1993-2006). In 2001/2002, he worked for PACT XPP Technologies, Inc., Munich, Germany.

He has been involved in the organization of various international conferences. He was General Co-Chair of IEEE/IFIP EUC’2015 and IEEE CSE’2015, General Chair of FPL’2013, General Co-Chair of ARC’2014 and ARC’2006, Program Co-Chair of HEART’2019, ARCS'2016, DASIP'2014 and RAW’2010. He served as a Program Committee member for many international conferences. He is co-author of one Morgan Kaufmann book, one Springer book, co-editor of two Springer Books and three Springer LNCS volumes. He has (co-)authored over 250 scientific publications (including journal/conference papers and patents) on subjects related to compilers, embedded systems, and reconfigurable computing. He has participated in a number of research projects: as technical manager of the H2020 FET-HPC project ANTAREX, as co-scientific coordinator of the FP7 EU-funded project REFLECT (2010-2012), and as coordinator of a number of nationally-funded projects.

He is a senior member of IEEE, a member of IEEE Computer Society, and a senior member of ACM.

His research interests include compilation techniques, domain-specific languages, reconfigurable computing, application-specific architectures, and high-performance (embedded) computing.

Activities

Employment (7)

Universidade do Porto Faculdade de Engenharia: Porto, Porto, PT

2016-12-21 to present | Full Professor (Informatics Engineering Department)
Employment
Source: Self-asserted source
João M.P. Cardoso

Universidade do Porto Faculdade de Engenharia: Porto, PT

2008-09-04 to 2016-12-20 | Prof. Associado (Departamento de Engenharia Informática)
Employment
Source: Self-asserted source
João M.P. Cardoso

Universidade Técnica de Lisboa Instituto Superior Técnico: Lisboa, Lisboa, PT

2006-04-04 to 2008-09-03 | Prof. Auxiliar (Departamento de Engenharia Informática)
Employment
Source: Self-asserted source
João M.P. Cardoso

Universidade do Algarve: Faro, PT

2001-04-02 to 2006-04-03 | Prof. Auxiliar (aculdade de Ciências e Tecnologia da Universidade)
Employment
Source: Self-asserted source
João M.P. Cardoso

PACT XPP Technologies: Munich, DE

2001-09-01 to 2002-08-31 | Compilers Expert
Employment
Source: Self-asserted source
João M.P. Cardoso

Universidade do Algarve: Faro, PT

1997-03-21 to 2001-04-01 | Assistente (aculdade de Ciências e Tecnologia da Universidade)
Employment
Source: Self-asserted source
João M.P. Cardoso

Universidade do Algarve: Faro, PT

1993-12-15 to 1997-03-20 | Assistente Estagiário (na Unidade de Ciências Exactas e Humanas)
Employment
Source: Self-asserted source
João M.P. Cardoso

Education and qualifications (3)

Universidade Técnica de Lisboa Instituto Superior Técnico: Lisboa, Lisboa, PT

2001-04-02 | PhD in Electrical and Computer Engineering (Department of Electrical and Computer Engineering)
Education
Source: Self-asserted source
João M.P. Cardoso

Universidade Técnica de Lisboa Instituto Superior Técnico: Lisboa, Lisboa, PT

1997-03-21 | MSc in Electrical and Computer Engineering (Department of Electrical and Computer Engineering)
Education
Source: Self-asserted source
João M.P. Cardoso

Universidade de Aveiro: Aveiro, PT

1993-09 | 5-Year Engineering Degree in Electronics and Telecommunications (Department of Electronics and Telecommunications Engineering)
Education
Source: Self-asserted source
João M.P. Cardoso

Professional activities (3)

Association for Computing Machinery: New York, NY, US

1999-07 to present
Membership
Source: Self-asserted source
João M.P. Cardoso

IEEE Computer Society: Washington, DC, US

1999-01-01 to present
Membership
Source: Self-asserted source
João M.P. Cardoso

IEEE: New York, NY, US

1993-12-01 to present
Membership
Source: Self-asserted source
João M.P. Cardoso

Funding (11)

Power Efficiency and Performance for Embedded and HPC Systems with Custom CGRAs

2018-10-01 to 2021-09-30 | Contract
Fundação para a Ciência e a Tecnologia (Lisboa, PT)
GRANT_NUMBER:

PTDC/EEI-HAC/30848/2017

Source: check_circle
CIÊNCIAVITAE

Middleware and Context Inference Techniques from Data-Streams for the Development of Context-Aware Services using Mobile Devices

2016-06-01 to 2019-12-31 | Contract
Fundação para a Ciência e a Tecnologia (Lisboa, PT)
GRANT_NUMBER:

PTDC/EEI-SCR/6945/2014

Source: check_circle
CIÊNCIAVITAE

Middleware and Context Inference Techniques from Data-Streams for the Development of Context-Aware Services using Mobile Devices

AutoTuning and Adaptivity appRoach for Energy efficient eXascale HPC systems

Source: Self-asserted source
João M.P. Cardoso via DimensionsWizard

BESTCASE-RL8-REALTIME: Languages and tools for critical real time systems

2013-01 to 2015-06 | Grant
Autoriadade de Gestão do Programa Operacional Regional do Norte (Porto, PT)
Source: check_circle
CIÊNCIAVITAE
grade
Preferred source (of 2)‎

AutoSeer: Automated Test Oracles for Software Error Detection

Source: Self-asserted source
João M.P. Cardoso via DimensionsWizard

Rendering FPGAs to Multi-Core Embedded Computing

Source: Self-asserted source
João M.P. Cardoso via DimensionsWizard

AMADEUS: ASPECTS AND COMPILER OPTIMIZATIONS FOR MATLAB SYSTEM DEVELOPMENT

Source: Self-asserted source
João M.P. Cardoso via DimensionsWizard
grade
Preferred source (of 2)‎

AMADEUS: ASPECTS AND COMPILER OPTIMIZATIONS FOR MATLAB SYSTEM DEVELOPMENT

Source: Self-asserted source
João M.P. Cardoso via DimensionsWizard

COBAYA: CLOSING THE COMPILATION GAP BETWEEN ALGORITHMS AND COARSE-GRAINED RECONFIGURABLE ARRAY ARCHITECTURES

2007-10-01 to 2011-03-31 | Grant
Fundação para a Ciência e a Tecnologia, I.P. (Lisbon, PT)
GRANT_NUMBER: 70272
Source: Self-asserted source
João M.P. Cardoso via DimensionsWizard
grade
Preferred source (of 2)‎

CHIADO: Compilation of High-Level Computationally Intensive Algorithms to Dynamically Reconfigurable COmputing Systems

Source: Self-asserted source
João M.P. Cardoso via DimensionsWizard
grade
Preferred source (of 2)‎

Peer review (137 reviews for 17 publications/grants)

Review activity for ACM transactions on architecture and code optimization. (18)
Review activity for ACM transactions on design automation of electronic systems. (6)
Review activity for ACM transactions on embedded computing systems : (22)
Review activity for ACM transactions on reconfigurable technology and systems. (13)
Review activity for ACM transactions on software engineering and methodology. (4)
Review activity for IEEE access : (20)
Review activity for IEEE computer architecture letters. (2)
Review activity for IEEE consumer electronics magazine. (1)
Review activity for IEEE embedded systems letters. (1)
Review activity for IEEE journal of solid-state circuits. (2)
Review activity for IEEE micro. (3)
Review activity for IEEE transactions on artificial intelligence. (1)
Review activity for IEEE transactions on computer-aided design of integrated circuits and systems : (4)
Review activity for IEEE transactions on computers. (13)
Review activity for IEEE transactions on nuclear science. (1)
Review activity for IEEE transactions on parallel and distributed systems : (16)
Review activity for IEEE transactions on very large scale integration (VLSI) systems. (10)