João M.P. Cardoso

ORCID iD
orcid.org/0000-0002-7353-1799
  • Country
  • Show details Hide details
Portugal

Sources:
João M.P. Cardoso (2016-01-24)

  • Keywords
  • Show details Hide details
Reconfigurable Computing, Compilers, Domain-Specific Languages, FPGAs

Sources:
João M.P. Cardoso (2016-05-06)

  • Websites
  • Show details Hide details
Personal website

Sources:
João M.P. Cardoso (2016-05-06)

  • Email
  • Show details Hide details

Sources:
0000-0002-7353-1799 (2013-03-08)

  • Other IDs
  • Show details Hide details
Scopus Author ID: 9639597300

Sources:
Scopus to ORCID (2013-12-13)

ResearcherID: C-5552-2008

Sources:
Clarivate Analytics (2013-12-18)

Authenticus: R-000-75E

Sources:
Authenticus (2016-04-05)

Biography

João M. P. Cardoso received a 5-year Electronics Engineering degree from the University of Aveiro in 1993, and an MSc and a PhD degree in Electrical and Computer Engineering from the IST/UTL (Technical University of Lisbon), Lisbon, Portugal in 1997 and 2001, respectively. He is currently Full Professor at the Department of Informatics Engineering, Faculty of Engineering of the University of Porto, Porto, Portugal and a research member of INESC TEC. Before, he was with the IST/UTL (2006-2008), a senior researcher at INESC-ID (2001-2009), and with the University of Algarve (1993-2006). In 2001/2002, he worked for PACT XPP Technologies, Inc., Munich, Germany. He has been involved in the organization of various international conferences. He was general Co-Chair of IEEE/IFIP EUC’2015 and IEEE CSE’2015, General Chair of FPL’2013, General Co-Chair of ARC’2014 and ARC’2006, Program Co-Chair of RAW’2010, and Program Co-Chair of DASIP’2014. He served as a Program Committee member for many international conferences. He is co-author of one Springer book, co-editor of two Springer Books and three Springer LNCS volumes. He has (co-)authored over 150 scientific publications (including journal/conference papers and patents) on subjects related to compilers, embedded systems, and reconfigurable computing. He is the technical manager of the H2020 FET-HPC project ANTAREX. He has participated in a number of research projects: as co-scientific coordinator of the FP7 EU-funded project REFLECT (2010-2012), and as coordinator of a number of national funded projects. He is a senior member of IEEE, a member of IEEE Computer Society, and a senior member of ACM. His research interests include compilation techniques, domain-specific languages, reconfigurable computing, application-specific architectures, and high-performance embedded computing.
  • : , ,

    {{group.getActive().startDate.year}}-{{group.getActive().startDate.month}}-{{group.getActive().startDate.day}} to present {{group.getActive().endDate.year}}-{{group.getActive().endDate.month}}-{{group.getActive().endDate.day}} {{group.getActive().endDate.year}}-{{group.getActive().endDate.month}}-{{group.getActive().endDate.day}}
     ()
    Source: {{(group.getActive().sourceName == null || group.getActive().sourceName == '') ? group.getActive().source : group.getActive().sourceName}}
    Created:
No education added yet
  • : , ,

    {{group.getActive().startDate.year}}-{{group.getActive().startDate.month}}-{{group.getActive().startDate.day}} to present {{group.getActive().endDate.year}}-{{group.getActive().endDate.month}}-{{group.getActive().endDate.day}} {{group.getActive().endDate.year}}-{{group.getActive().endDate.month}}-{{group.getActive().endDate.day}}
     ()
    Source: {{(group.getActive().sourceName == null || group.getActive().sourceName == '') ? group.getActive().source : group.getActive().sourceName}}
    Created:
No employment added yet
No Funding added yet
No publications added yet