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Taiwan

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Employment (1)

Micron Technology: Taichung, TW

2021-01-18 to present | Product Engineer - Process Team (DRAM Engineering Group)
Employment
Source: Self-asserted source
Yu-Cheng Cheng

Education and qualifications (3)

National Chung Hsing University: Taichung, TW

2013-02-01 to 2019-02-01 | Ph.D. (Computer Science and Engineering)
Education
Source: Self-asserted source
Yu-Cheng Cheng

National Chung Hsing University: Taichung, TW

2011-08-01 to 2013-01-31 | Master of Science (Computer Science and Engineering)
Education
Source: Self-asserted source
Yu-Cheng Cheng

National Chung Hsing University: Taichung, TW

2007-08-01 to 2011-07-31 | Bachelor of Science (Computer Science and Engineering)
Education
Source: Self-asserted source
Yu-Cheng Cheng

Professional activities (1)

The Phi Tau Phi Scholastic Honor Society of the Republic of China: Taichung, TW

2019-05-09 to present | Honorary Membership
Membership
Source: Self-asserted source
Yu-Cheng Cheng

Works (16)

Data Retention-Based Low Leakage Power TCAM for Network Packet Routing

IEEE Transactions on Circuits and Systems II: Express Briefs
2021-02-01 | Journal article
Source: Self-asserted source
Yu-Cheng Cheng

A Low Power Radix-4 Booth Multiplier with Pre-Encoded Mechanism

IEEE Access
2020-06-19 | Journal article
Source: Self-asserted source
Yu-Cheng Cheng

Low-Power Ternary Content-Addressable Memory Design Based on a Voltage Self-Controlled Fin Field-Effect Transistor Segment

Computers and Electrical Engineering
2020-01 | Journal article
Source: Self-asserted source
Yu-Cheng Cheng

Imprecise 4-2 Compressor Design Used in Image Processing Applications

IET Circuits, Devices & Systems
2019-10-10 | Journal article
Source: Self-asserted source
Yu-Cheng Cheng

A Low Power Radix-4 Booth Multiplier with Precise Operand Exchange Technique

2019 IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 22)
2019-04 | Conference poster
Source: Self-asserted source
Yu-Cheng Cheng

低漏電流之網路路由表設計

2019-01 | Dissertation or Thesis
Source: Self-asserted source
Yu-Cheng Cheng

An Imprecise 4-2 Compressor Design with Low Error Rate

2018 IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 21)
2018-04 | Conference poster
Source: Self-asserted source
Yu-Cheng Cheng

A High-Speed Radix-4 Adder Design

2017 The 28th VLSI Design/CAD Symposium
2017-08 | Conference paper
Source: Self-asserted source
Yu-Cheng Cheng

Radix-4 Adder Design with Refined Carry

2017 IEEE Conference on Dependable and Secure Computing
2017-08 | Conference paper
Source: Self-asserted source
Yu-Cheng Cheng

Low Leakage Mask Vertical Control TCAM for Network Router

2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
2016-10 | Conference paper
Source: Self-asserted source
Yu-Cheng Cheng

Low Power Pre-encoded Radix-4 Booth Multiplier

2016 IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XIX)
2016-04 | Conference poster
Source: Self-asserted source
Yu-Cheng Cheng

A Novel Imprecise Compressor Design Used in DSP Multiplier

2015 The 26th VLSI Design/CAD Symposium
2015-08 | Conference paper
Source: Self-asserted source
Yu-Cheng Cheng

Low Leakage Router Design Using Vertical Gating Technique

2015 IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XVIII)
2015-04 | Conference poster
Source: Self-asserted source
Yu-Cheng Cheng

Automatic Charge Balancing Content Addressable Memory With Self-control Mechanism

IEEE Transactions on Circuits and Systems I: Regular Papers
2014-09-18 | Journal article
Source: Self-asserted source
Yu-Cheng Cheng

Charge Balance Tag Memory Design Used in TLB

2013 IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XVI)
2013-04 | Conference poster
Source: Self-asserted source
Yu-Cheng Cheng

應用於TLB中之電荷平衡標籤記憶體設計

2013-01 | Dissertation or Thesis
Source: Self-asserted source
Yu-Cheng Cheng
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