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Works (3)

Standalone Nested Loop Acceleration on CGRAs for Signal Processing Applications

2024 | Book chapter
DOI: 10.1007/978-3-031-62874-0_7
Contributors: Chilankamol Sunny; Satyajit Das; Kevin J. M. Martin; Philippe Coussy
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CREPE: Concurrent Reverse-Modulo-Scheduling and Placement for CGRAs

IEEE Transactions on Parallel and Distributed Systems
2024-07 | Journal article
DOI: 10.1109/TPDS.2024.3402098
Contributors: Chilankamol Sunny; Satyajit Das; Kevin J. M. Martin; Philippe Coussy
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Energy Efficient Hardware Loop Based Optimization for CGRAs

Journal of Signal Processing Systems
2022-09 | Journal article
DOI: 10.1007/s11265-022-01760-9
Contributors: Chilankamol Sunny; Satyajit Das; Kevin J. M. Martin; Philippe Coussy
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