Personal information

Biography

Hyeok Yun received the B.S. degree in electrical engineering from Pohang University of Science and Technology (POSTECH), Republic of Korea, in 2019. He is currently pursuing the M.S. and Ph. D integrated course in electrical engineering from POSTECH. His research interests include variability of multi-gate field-effect transistors (FinFETs, nanowire FETs, and nanosheet FETs) and machine learning.

Activities

Education and qualifications (1)

Pohang University of Science and Technology: Pohang, Gyeongsangbuk-do, KR

2012-10-07 to 2019-08-09 | Bachelor of Science (Electrical Engineering)
Education
Source: Self-asserted source
Hyeok Yun

Works (15)

Multi-Task Learning for Real-Time BSIM-CMG Parameter Extraction of NSFETs with Multiple Structural Variations

IEEE Access
2024 | Journal article
Contributors: Seunghwan Lee; Seungjoon Eom; Jinsu Jeong; Junjong Lee; Sanguk Lee; Hyeok Yun; Yonghwan Ahn; Rock-Hyun Baek
Source: check_circle
Crossref

Program Pulse Control for Program Efficiency and Disturbance of 3D-NAND Flash Using Novel Machine Learning-Based Pareto Optimization

IEEE Transactions on Electron Devices
2024-11 | Journal article
Contributors: Kihoon Nam; Donghyun Kim; Hyeok Yun; Chanyang Park; Hyundong Jang; Kyeongrae Cho; Seungjoon Eom; Jiyoon Kim; Seonhaeng Lee; Namhyun Lee et al.
Source: check_circle
Crossref

Enhancement of ISPP Efficiency Using Neural Network-Based Optimization of 3-D NAND Cell

IEEE Transactions on Electron Devices
2023 | Journal article
Contributors: Kyeongrae Cho; Hyeok Yun; Kihoon Nam; Chanyang Park; Hyundong Jang; Jun-Sik Yoon; Hyun-Chul Choi; Min Sang Park; Rock-Hyun Baek
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Crossref

Holistic Optimization of Trap Distribution for Performance/Reliability in 3-D NAND Flash Using Machine Learning

IEEE Access
2023 | Journal article
Contributors: Kihoon Nam; Chanyang Park; Hyeok Yun; Jun-Sik Yoon; Hyundong Jang; Kyeongrae Cho; Min Sang Park; Hyun-Chul Choi; Rock-Hyun Baek
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Crossref

Accurate Prediction and Reliable Parameter Optimization of Neural Network for Semiconductor Process Monitoring and Technology Development

Advanced Intelligent Systems
2023-09 | Journal article
Contributors: Hyeok Yun; Chang-Hyeon An; Hyundong Jang; Kyeongrae Cho; Jeong-Sik Lee; Seungjoon Eom; Choong-Ki Kim; Min-Soo Yoo; Hyun-Chul Choi; Rock-Hyun Baek
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Crossref

Optimization of Process Parameters on Short-Term Retention for Charge-Trapping 3-D NAND Flash Memories Using Novel Neural Networks Approach

IEEE Transactions on Electron Devices
2023-08 | Journal article
Contributors: Hyundong Jang; Kihoon Nam; Hyeok Yun; Kyeongrae Cho; Seungjoon Eom; Min Sang Park; Rock-Hyun Baek
Source: check_circle
Crossref

Extraction of Device Structural Parameters Through DC/AC Performance Using an MLP Neural Network Algorithm

IEEE Access
2022 | Journal article
Contributors: Hyundong Jang; Hyeok Yun; Chanyang Park; Kyeongrae Cho; Kihoon Nam; Jun-Sik Yoon; Hyun-Chul Choi; Rock-Hyun Baek
Source: check_circle
Crossref

Bi-Directional Long Short-Term Memory Neural Network Modeling of Data Retention Characterization in 3-D Triple-Level Cell NAND Flash Memory

IEEE Transactions on Electron Devices
2022-08 | Journal article
Contributors: Hyundong Jang; Chanyang Park; Kihoon Nam; Hyeok Yun; Kyeongrae Cho; Jun-Sik Yoon; Hyun-Chul Choi; Ho-Jung Kang; Min Sang Park; Jaesung Sim et al.
Source: check_circle
Crossref

Optimal Energetic-Trap Distribution of Nano-Scaled Charge Trap Nitride for Wider <i>V<sub>th</sub></i> Window in 3D NAND Flash Using a Machine-Learning Method

Nanomaterials
2022-05 | Journal article | Author
Contributors: Kihoon Nam; Chanyang Park; JunSik Yoon; Hyeok Yun; Hyundong Jang; Kyeongrae Cho; Ho-Jung Kang; minsang park; Jaesung Sim; Hyun-Chul Choi et al.
Source: check_circle
Multidisciplinary Digital Publishing Institute
grade
Preferred source (of 2)‎

Novel Modeling Approach to Analyze Threshold Voltage Variability in Short Gate-Length (15–22 nm) Nanowire FETs with Various Channel Diameters

Nanomaterials
2022-05-18 | Journal article
Contributors: Seunghwan Lee; Jun-Sik Yoon; Junjong Lee; Jinsu Jeong; Hyeok Yun; Jaewan Lim; Sanguk Lee; Rock-Hyun Baek
Source: check_circle
Crossref
grade
Preferred source (of 2)‎

Digital/Analog Performance Optimization of Vertical Nanowire FETs Using Machine Learning

IEEE Access
2021 | Journal article
Contributors: Jun-Sik Yoon; Seunghwan Lee; Hyeok Yun; Rock-Hyun Baek
Source: check_circle
Crossref

Neural Approach for Modeling and Optimizing Si-MOSFET Manufacturing

IEEE Access
2020 | Journal article
Contributors: Hyun-Chul Choi; Hyeok Yun; Jun-Sik Yoon; Rock-Hyun Baek
Source: check_circle
Crossref

Neural Network Based Design Optimization of 14-nm Node Fully-Depleted SOI FET for SoC and 3DIC Applications

IEEE Journal of the Electron Devices Society
2020 | Journal article
Contributors: Hyeok Yun; Jun-Sik Yoon; Jinsu Jeong; Seunghwan Lee; Hyun-Chul Choi; Rock-Hyun Baek
Source: check_circle
Crossref

Reduction of Process Variations for Sub-5-nm Node Fin and Nanosheet FETs Using Novel Process Scheme

IEEE Transactions on Electron Devices
2020-07 | Journal article
Contributors: Jun-Sik Yoon; Seunghwan Lee; Junjong Lee; Jinsu Jeong; Hyeok Yun; Rock-Hyun Baek
Source: check_circle
Crossref

Source/Drain Patterning FinFETs as Solution for Physical Area Scaling Toward 5-nm Node

IEEE Access
2019 | Journal article
Contributors: Jun-Sik Yoon; Seunghwan Lee; Junjong Lee; Jinsu Jeong; Hyeok Yun; Bohyeon Kang; Rock-Hyun Baek
Source: check_circle
Crossref