Personal information

Other IDs

Scopus Author ID: 24473767200

Activities

Collapse all

Works (12)

A 2-to-10-b Output Precision Reconfigurable Compute-In-Memory Macro Leveraging Input Conditioning Using Residue Amplification

IEEE Solid-State Circuits Letters
2024 | Journal article
DOI: 10.1109/LSSC.2024.3415476
Contributors: Balaji Vijayakumar; Ashwin Balagopal Sundar; Janakiraman Viraraghavan; Varchas Bharadwaj
Source: check_circle
Crossref

Input-Conditioned Quantisation for ENOB Improvement in CIM ADC Columns Targeting Large-Length Partial Sums

IEEE Transactions on Circuits and Systems II: Express Briefs
2024 | Journal article
DOI: 10.1109/TCSII.2024.3357064
Contributors: Ashwin Balagopal Sundar; Janakiraman Viraraghavan; Balaji Vijayakumar
Source: check_circle
Crossref

Geometric Programming Approach to Glitch Minimization via Gate Sizing

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2023-06 | Journal article
DOI: 10.1109/TCAD.2022.3207970
Contributors: Karthikeyan Muthamizh Vithagan; Vignesh Sundaresha; Janakiraman Viraraghavan
Source: check_circle
Crossref

Layout-Based Digital IC Course Projects in Large Classes: Implementation, Evaluation, and Plagiarism Detection

IEEE Transactions on Education
2023-02 | Journal article
DOI: 10.1109/TE.2022.3192624
Contributors: Alfred Festus Davidson; Janakiraman Viraraghavan
Source: check_circle
Crossref

Input Conditioned Subranging and Skewed Quantisation of MACs in IMC

2022-07-20 | Preprint
DOI: 10.36227/techrxiv.20330580
Contributors: Ashwin Balagopal Sundar; Janakiraman Viraraghavan; Balaji Vijayakumar
Source: check_circle
Crossref

Input Conditioned Subranging and Skewed Quantisation of MACs in IMC

2022-07-20 | Preprint
DOI: 10.36227/techrxiv.20330580.v1
Contributors: Ashwin Balagopal Sundar; Janakiraman Viraraghavan; Balaji Vijayakumar
Source: check_circle
Crossref

Statistical compact model extraction for skew‐normal distributions

IET Circuits, Devices & Systems
2020-08 | Journal article
DOI: 10.1049/iet-cds.2019.0366
Contributors: Koduru Revanth; Viraraghavan Janakiraman
Source: check_circle
Crossref

80Kb 10ns read cycle logic Embedded High-K charge trap Multi-Time-Programmable Memory scalable to 14nm FIN with no added process complexity

IEEE Symposium on VLSI Circuits, Digest of Technical Papers
2016 | Conference paper
DOI: 10.1109/VLSIC.2016.7573462
EID:

2-s2.0-84990966824
Contributors: Viraraghavan, J.; Leu, D.; Jayaraman, B.; Cestero, A.; Kilker, R.; Yin, M.; Golz, J.; Tummuru, R.R.; Raghavan, R.; Moy, D. et al.
Source: Self-asserted source
Janakiraman Viraraghavan via Scopus - Elsevier

A 14 nm 1.1 Mb embedded DRAM macro with 1 ns access

IEEE Journal of Solid-State Circuits
2016 | Journal article
DOI: 10.1109/JSSC.2015.2456873
EID:

2-s2.0-84939599917
Contributors: Fredeman, G.; Plass, D.W.; Mathews, A.; Viraraghavan, J.; Reyer, K.; Knips, T.J.; Miller, T.; Gerhard, E.L.; Kannambadi, D.; Paone, C. et al.
Source: Self-asserted source
Janakiraman Viraraghavan via Scopus - Elsevier

Statistical compact model extraction: A neural network approach

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2012 | Journal article
DOI: 10.1109/TCAD.2012.2207955
EID:

2-s2.0-84869433482
Contributors: Viraraghavan, J.; Pandharpure, S.J.; Watts, J.
Source: Self-asserted source
Janakiraman Viraraghavan via Scopus - Elsevier

Voltage and temperature scalable logic cell leakage models considering local variations based on transistor stacks

Journal of Low Power Electronics
2008 | Journal article
DOI: 10.1166/jolpe.2008.187
EID:

2-s2.0-67649534982
Contributors: Viraraghavan, J.; Amrutur, B.; Visvanathan, V.
Source: Self-asserted source
Janakiraman Viraraghavan via Scopus - Elsevier

Voltage and temperature scalable standard cell leakage models based on stacks for statistical leakage characterization

Proceedings of the IEEE International Frequency Control Symposium and Exposition
2008 | Conference paper
DOI: 10.1109/VLSI.2008.38
EID:

2-s2.0-47649105755
Contributors: Viraraghavan, J.; Das, B.P.; Amrutur, B.
Source: Self-asserted source
Janakiraman Viraraghavan via Scopus - Elsevier
How many people are using ORCID?