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Employment (1)

Rambus Inc: Sunnyvale, CA, US

1999-03-01 to present
Employment
Source: Self-asserted source
Carl Werner

Education and qualifications (2)

University of Illinois System: Urbana, IL, US

BSEE (Electrical Engineering)
Education
Source: Self-asserted source
Carl Werner

San Jose State University: San Jose, California, US

MSEE
Education
Source: Self-asserted source
Carl Werner

Works (25)

Differential Edge-Modulated Signaling With Encoded Clock and Dynamic Data Rate Scaling

IEEE Solid-State Circuits Letters
2021 | Journal article
DOI: 10.1109/LSSC.2021.3069796
Source: Self-asserted source
Carl Werner

A compact, scalable 60GHz active phase shifter and combiner in 28nm CMOS

2013 IEEE MTT-S International Microwave Symposium Digest (MTT)
2013 | Conference paper
DOI: 10.1109/MWSYM.2013.6697437
Source: Self-asserted source
Carl Werner

A 32GHz delay locked loop with a full rate sub-psec phase detector in 40nm CMOS

2012 IEEE/MTT-S International Microwave Symposium Digest
2012 | Conference paper
DOI: 10.1109/MWSYM.2012.6257763
Source: Self-asserted source
Carl Werner

A Multiband Transceiver System in 45-nm CMOS for Extended Data Rate through Notchy Wireline Channels

IEEE Transactions on Circuits and Systems II: Express Briefs
2011 | Journal article
DOI: 10.1109/TCSII.2011.2161162
Source: Self-asserted source
Carl Werner
grade
Preferred source (of 2)‎

An amplitude-based phase detector at mm-wave frequency range

2011 IEEE MTT-S International Microwave Symposium
2011 | Conference paper
DOI: 10.1109/MWSYM.2011.5973414
Source: Self-asserted source
Carl Werner

An amplitude-based phase detector at MM-wave frequency range

2011 IEEE MTT-S International Microwave Symposium
2011 | Conference paper
DOI: 10.1109/MWSYM.2011.5972986
Source: Self-asserted source
Carl Werner

A sub-resonant 40GHz clock distribution network with near zero skew

2010 IEEE MTT-S International Microwave Symposium
2010 | Conference paper
DOI: 10.1109/MWSYM.2010.5515024
Source: Self-asserted source
Carl Werner
grade
Preferred source (of 2)‎

Exploring Liquid Crystal Polymer (LCP) substrates for mm-Wave antennas in portable devices

2010 IEEE Antennas and Propagation Society International Symposium
2010 | Conference paper
DOI: 10.1109/APS.2010.5561687
Source: Self-asserted source
Carl Werner
grade
Preferred source (of 2)‎

Low-skew clock distribution using zero-phase-clock-buffer DLLs

2010 IEEE International Solid-State Circuits Conference - (ISSCC)
2010 | Conference paper
DOI: 10.1109/ISSCC.2010.5434002
Source: Self-asserted source
Carl Werner
grade
Preferred source (of 2)‎

Equalization of mid-frequency power supply noise via a spectrum-shaping encoder for parallel buses

2009 59th Electronic Components and Technology Conference
2009 | Conference paper
DOI: 10.1109/ECTC.2009.5074152
Source: Self-asserted source
Carl Werner
grade
Preferred source (of 2)‎

First Pass MM-Wave Circuit Design in 65nm Digital CMOS

2009 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
2009 | Conference paper
DOI: 10.1109/SMIC.2009.4770525
Source: Self-asserted source
Carl Werner
grade
Preferred source (of 2)‎

Characterizing sampling aperture of clocked comparators

2008 IEEE Symposium on VLSI Circuits
2008 | Conference paper
DOI: 10.1109/VLSIC.2008.4585955
Source: Self-asserted source
Carl Werner

A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
2007 | Conference paper
DOI: 10.1109/ISSCC.2007.373377
Source: Self-asserted source
Carl Werner
grade
Preferred source (of 2)‎

PLL On-Chip Jitter Measurement: Analysis and Design

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.
2006 | Conference paper
DOI: 10.1109/VLSIC.2006.1705318
Source: Self-asserted source
Carl Werner

A 1-10 Gbps PAM2, PAM4, PAM2 partial response receiver analog front end with dynamic sampler swapping capability for backplane serial communications

Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005.
2005 | Conference paper
DOI: 10.1109/VLSIC.2005.1469408
Source: Self-asserted source
Carl Werner

Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery

IEEE Journal of Solid-State Circuits
2005 | Journal article
DOI: 10.1109/JSSC.2004.842863
Source: Self-asserted source
Carl Werner

Modeling, simulation, and design of a multi-mode 2-10 Gb/sec fully adaptive serial link system

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005.
2005 | Conference paper
DOI: 10.1109/CICC.2005.1568767
Source: Self-asserted source
Carl Werner

Adaptive equalization and data recovery in a dual-mode (PAM2/4) serial link transceiver

2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)
2004 | Conference paper
DOI: 10.1109/VLSIC.2004.1346611
Source: Self-asserted source
Carl Werner

Common-mode backchannel signaling system for differential high-speed links

2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)
2004 | Conference paper
DOI: 10.1109/VLSIC.2004.1346612
Source: Self-asserted source
Carl Werner

Phase-locked loop architecture for adaptive jitter optimization

2004 IEEE International Symposium on Circuits and Systems (ISCAS)
2004 | Conference paper
DOI: 10.1109/ISCAS.2004.1328965
Source: Self-asserted source
Carl Werner

Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell

IEEE Journal of Solid-State Circuits
2003 | Journal article
DOI: 10.1109/JSSC.2003.818572
Source: Self-asserted source
Carl Werner

Equalization and clock recovery for a 2.5-10Gb/s 2-PAM/4-PAM backplane transceiver cell

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.
2003 | Conference paper
DOI: 10.1109/ISSCC.2003.1234216
Source: Self-asserted source
Carl Werner

1.6 Gb/s/pin 4-PAM signaling and circuits for a multidrop bus

IEEE Journal of Solid-State Circuits
2001 | Journal article
DOI: 10.1109/4.918912
Source: Self-asserted source
Carl Werner

A 2 Gb/s/pin 4-PAM parallel bus interface with transmit crosstalk cancellation, equalization, and integrating receivers

2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)
2001 | Conference paper
DOI: 10.1109/ISSCC.2001.912549
Source: Self-asserted source
Carl Werner

1.6 Gb/s/pin 4-PAM signaling and circuits for a multi-drop bus

2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)
2000 | Conference paper
DOI: 10.1109/VLSIC.2000.852869
Source: Self-asserted source
Carl Werner
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