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Employment (1)

NXP Semiconductors: Kaohsiung City, TW

2018 to present | PRODUCT/TEST ENGINEER (Wafer Testing)
Employment
Source: Self-asserted source
Chau Cheung Cheng

Education and qualifications (2)

National Sun Yat-sen University: Kaohsiung, TW

2020 to 2022 | Master (Computer Science and Engineering)
Education
Source: Self-asserted source
Chau Cheung Cheng

National Sun Yat-sen University: Kaohsiung, TW

2014 to 2018 | Bachelor (Computer Science and Engineering)
Education
Source: Self-asserted source
Chau Cheung Cheng

Works (11)

TestDNA-E: Wafer Defect Signature for Pattern Recognition by Ensemble Learning

IEEE Transactions on Semiconductor Manufacturing
2022 | Journal article
DOI: 10.1109/TSM.2022.3145855
Source: Self-asserted source
Chau Cheung Cheng

Wafer Scratch Pattern Reconstruction for High Diagnosis Accuracy and Yield Optimization

IEEE Transactions on Semiconductor Manufacturing
2022 | Journal article
DOI: 10.1109/TSM.2022.3146857
Source: Self-asserted source
Chau Cheung Cheng

Automatic Inspection for Wafer Defect Pattern Recognition with Unsupervised Clustering

2021 IEEE European Test Symposium (ETS)
2021 | Conference paper
DOI: 10.1109/ETS50041.2021.9465457
Source: Self-asserted source
Chau Cheung Cheng

Hidden Wafer Scratch Defects Projection for Diagnosis and Quality Enhancement

IEEE Transactions on Semiconductor Manufacturing
2021 | Journal article
DOI: 10.1109/TSM.2020.3040998
Source: Self-asserted source
Chau Cheung Cheng

Machine Learning-Based Detection Method for Wafer Test Induced Defects

IEEE Transactions on Semiconductor Manufacturing
2021 | Journal article
DOI: 10.1109/TSM.2021.3065405
Source: Self-asserted source
Chau Cheung Cheng

Innovative Practice on Wafer Test Innovations

2020 IEEE 38th VLSI Test Symposium (VTS)
2020 | Conference paper
DOI: 10.1109/VTS48691.2020.9107619
Source: Self-asserted source
Chau Cheung Cheng

PWS: Potential Wafermap Scratch Defect Pattern Recognition with Machine Learning Techniques

2020 IEEE European Test Symposium (ETS)
2020 | Conference paper
DOI: 10.1109/ETS48528.2020.9131598
Source: Self-asserted source
Chau Cheung Cheng

TestDNA-E: Wafer Defect Signature for Pattern Recognition by Ensemble Learning

2020 IEEE International Test Conference (ITC)
2020 | Conference paper
DOI: 10.1109/ITC44778.2020.9325237
Source: Self-asserted source
Chau Cheung Cheng

TestDNA: Novel Wafer Defect Signature for Diagnosis and Pattern Recognition

IEEE Transactions on Semiconductor Manufacturing
2020 | Journal article
DOI: 10.1109/TSM.2020.2992927
Source: Self-asserted source
Chau Cheung Cheng

Wafer-Level Test Path Pattern Recognition and Test Characteristics for Test-Induced Defect Diagnosis

2020 Design, Automation Test in Europe Conference Exhibition (DATE)
2020 | Conference paper
DOI: 10.23919/DATE48585.2020.9116546
Source: Self-asserted source
Chau Cheung Cheng

TestDNA: Novel Wafer Defect Signature for Diagnosis and Yield Learning

2019 IEEE International Test Conference (ITC)
2019 | Conference paper
DOI: 10.1109/ITC44170.2019.9000166
Source: Self-asserted source
Chau Cheung Cheng
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