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Education and qualifications (2)

Hanyang University: Seongdong-gu, Seoul, KR

2016-03-01 to 2024-02-01 | Ph. D (Electronic Eng. )
Education
Source: Self-asserted source
Jun-Hwan Jang

Hanyang University: Seongdong-gu, Seoul, KR

2012-03-01 to 2016-02-28 | BS (Electronics Eng/)
Education
Source: Self-asserted source
Jun-Hwan Jang

Works (4)

A 0.5–1-V Time-Voltage Hybrid Domain Dual- Loop Analog LDO With Wide-Bandwidth High PSR in 28 nm

IEEE Journal of Solid-State Circuits
2025-01 | Journal article
DOI: 10.1109/JSSC.2024.3409630
Contributors: Jun-Hwan Jang; Hui-Dong Gwon; Sungmin Yoo; Jun-Hyeok Yang; Byong-Deok Choi
Source: check_circle
Crossref

A 0.5–1 V, −68 dB Power Supply Rejection Capacitorless Analog LDO Using Voltage-to-Time Conversion in 28-nm CMOS

IEEE Journal of Solid-State Circuits
2022-08 | Journal article
DOI: 10.1109/JSSC.2022.3144437
Contributors: Jun-Hwan Jang; Hui-Dong Gwon; Tae-Hwang Kong; Jun-Hyeok Yang; Byong-Deok Choi
Source: check_circle
Crossref

A High-Reliability Carry-Free Gate Driver for Flexible Displays Using a-IGZO TFTs

IEEE Transactions on Electron Devices
2018-08 | Journal article
DOI: 10.1109/ted.2018.2843180
Part of ISSN: 0018-9383
Part of ISSN: 1557-9646
Source: Self-asserted source
Jun-Hwan Jang

Dynamic Logic Circuits Using a-IGZO TFTs

IEEE Transactions on Electron Devices
2017-10 | Journal article
DOI: 10.1109/ted.2017.2738665
Part of ISSN: 0018-9383
Part of ISSN: 1557-9646
Source: Self-asserted source
Jun-Hwan Jang
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