Personal information

Delta-Sigma, SAR, ADC, Test, Floating-Point, Taylor-Series, Algorithm
Japan

Activities

Education and qualifications (2)

Gunma University: Kiryu, Gunma, JP

2019-10-01 to present | Ph.D Candidates (Division of Electronics and Informatics)
Education
Source: Self-asserted source
Jianglin Wei

Gunma University: Kiryu, Gunma, JP

2017-10-01 to 2019-09-30 | M.S. (Division of Electronics and Informatics)
Education
Source: Self-asserted source
Jianglin Wei

Works (9)

Floating-Point Inverse Square Root Algorithm Based on Taylor-Series Expansion

IEEE Transactions on Circuits and Systems II: Express Briefs
2021 | Journal article
EID:

2-s2.0-85101819752

Part of ISSN: 15583791 15497747
Contributors: Wei, J.; Kuwana, A.; Kobayashi, H.; Kubo, K.; Tanaka, Y.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier
grade
Preferred source (of 2)‎

Testing Technologies for Analog/Mixed-Signal Circuits in IoT Era,IoT 時代のアナログ/ミクストシグナル回路テスト技術

IEEJ Transactions on Electronics, Information and Systems
2021 | Journal article
EID:

2-s2.0-85098708777

Part of ISSN: 13488155 03854221
Contributors: Kobayashi, H.; Kuwana, A.; Wei, J.; Tsukiji, N.; Zhao, Y.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier

Analog/Mixed-Signal Circuit Testing Technologies in IoT Era

2020 IEEE 15th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2020 - Proceedings
2020 | Conference paper
EID:

2-s2.0-85099189391

Contributors: Kobayashi, H.; Kuwana, A.; Wei, J.; Zhao, Y.; Katayama, S.; Tri, T.M.; Hirai, M.; Nakatani, T.; Hatayama, K.; Sato, K. et al.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier

Revisit to Floating-Point Division Algorithm Based on Taylor-Series Expansion

Proceedings of 2020 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2020
2020 | Conference paper
EID:

2-s2.0-85099532252

Contributors: Wei, J.; Kuwana, A.; Kobayashi, H.; Kubo, K.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier

Summing Node Test Method: Simultaneous Multiple AC Characteristics Testing of Multiple Operational Amplifiers

Proceedings of the Asian Test Symposium
2020 | Conference paper
EID:

2-s2.0-85099122731

Part of ISSN: 10817735
Contributors: Ogihara, G.; Nakatani, T.; Hatta, A.; Sato, K.; Ishida, T.; Okamoto, T.; Ichikawa, T.; Kuwana, A.; Aoki, R.; Katayama, S. et al.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier

High-resolution low-sampling-rate δ adc linearity short-time testing algorithm

Proceedings of International Conference on ASIC
2019 | Conference paper
EID:

2-s2.0-85082576894

Part of ISSN: 2162755X 21627541
Contributors: Wei, J.-L.; Ishida, T.; Okamoto, T.; Ichikawa, T.; Kushita, N.; Arai, T.; Sha, L.; Kuwana, A.; Kobayashi, H.; Nakatani, T. et al.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier

Innovative Test Practices in Japan

Proceedings of the IEEE VLSI Test Symposium
2019 | Conference paper
EID:

2-s2.0-85069211701

Contributors: Asada, Y.; Shimizu, T.; Gendai, Y.; Sato, K.; Ishida, T.; Okamoto, T.; Ichikawa, T.; Wei, J.-L.; Kushita, N.; Arai, H. et al.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier

Limit Cycle Suppression Technique Using Random Signal in Delta-Sigma da Modulator

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings
2018 | Conference paper
EID:

2-s2.0-85060300098

Contributors: Wei, J.-L.; Kushita, N.; Kobayashi, H.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier

Performance Improvement of Delta-Sigma ADC/DAC/TDC Using Digital Technique

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings
2018 | Conference paper
EID:

2-s2.0-85060311056

Contributors: Kobayashi, H.; Wei, J.-L.; Murakami, M.; Kojima, J.-Y.; Kushita, N.; Du, Y.; Wang, J.
Source: Self-asserted source
Jianglin Wei via Scopus - Elsevier