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Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation

IEEE Journal of Solid-State Circuits
2024 | Journal article
Contributors: Sangjin Kim; Soyeon Um; Wooyoung Jo; Jingu Lee; Sangwoo Ha; Zhiyong Li; Hoi-Jun Yoo
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Cache-PIM: An ECC-compatible eDRAM-PIM for Last-Level Cache with Resolution-aware Single-Cycle Voting

2024 IEEE European Solid-State Electronics Research Conference (ESSERC)
2024-09-09 | Conference paper
Contributors: Sangwoo Ha; Soyeon Um; Sangjin Kim; Kyomin Sohn; Hoi-Jun Yoo
Source: Self-asserted source
Sangwoo Ha

NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator

2024 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)
2024-04-17 | Conference paper
Contributors: Sangjin Kim; Zhiyong Li; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Sangyeob Kim; Hoi-Jun Yoo
Source: Self-asserted source
Sangwoo Ha

DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell

IEEE Journal of Solid-State Circuits
2024-01 | Journal article
Contributors: Sangjin Kim; Zhiyong Li; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Juhyoung Lee; Sangyeob Kim; Donghyeon Han; Hoi-Jun Yoo
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Crossref

Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
2023-06-11 | Conference paper
Contributors: Sangiin Kim; Soyeon Um; Wooyoung Jo; Jingu Lee; Sangwoo Ha; Zhiyong Li; Hoi-Jun Yoo
Source: Self-asserted source
Sangwoo Ha

16.5 DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching

2023 IEEE International Solid- State Circuits Conference (ISSCC)
2023-02-19 | Conference paper
Contributors: Sangjin Kim; Zhiyong Li; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Juhyoung Lee; Sangyeob Kim; Donghyeon Han; Hoi-Jun Yoo
Source: Self-asserted source
Sangwoo Ha

A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array

IEEE Transactions on Circuits and Systems II: Express Briefs
2022-05 | Journal article
Part of ISSN: 1549-7747
Part of ISSN: 1558-3791
Source: Self-asserted source
Sangwoo Ha
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