Personal information

Activities

Employment (3)

Ayar Labs: Santa Clara, CA, US

2019-04 to present | Senior SerDes Engineer
Employment
Source: Self-asserted source
Woorham Bae

University of California Berkeley: Berkeley, CA, US

2017-03 to 2019-03 | Postdoctoral researcher (EECS)
Employment
Source: Self-asserted source
Woorham Bae

Inter-University Semiconductor Research Center: Gwanak-gu, Seoul, KR

2016-09-01 to 2017-02-28
Employment
Source: Self-asserted source
Woorham Bae

Education and qualifications (2)

Seoul National University: Gwanak-gu, Seoul, KR

2011-03-01 to 2016-08-29 | Ph.D. (Department of Electrical and Computer Engineering)
Education
Source: Self-asserted source
Woorham Bae

Seoul National University: Gwanak-gu, Seoul, KR

2006-03-01 to 2010-08-27 | B.S. (Department of Electrical and Computer Engineering)
Education
Source: Self-asserted source
Woorham Bae

Professional activities (3)

IEEE: New York, NY, US

2018-11 to present | Associate Editor (IEEE ACCESS)
Service
Source: Self-asserted source
Woorham Bae

IEEE: New York, NY, US

2017-10 to present | Editorial Review Board (IEEE Solid-State Circuits Letters)
Service
Source: Self-asserted source
Woorham Bae

Outstanding Young Author Award: IEEE Circuits and Systems Society, IEEE, US

2018
Distinction
Source: Self-asserted source
Woorham Bae

Works (50)

A High-Frequency and Low-Jitter DLL With Quadrature Error and Duty-Cycle Corrections Based on Asynchronous Sampling

IEEE Solid-State Circuits Letters
2023 | Journal article
Contributors: Gijin Park; Dongjun Lee; Jaeduk Han; Woorham Bae
Source: check_circle
Crossref

Benchmark Figure of Merit Extensions for Low Jitter Phase Locked Loops Inspired by New PLL Architectures

IEEE Access
2022 | Journal article
Contributors: Woorham Bae
Source: check_circle
Crossref

In-Memory Hamming Error-Correcting Code in Memristor Crossbar

IEEE Transactions on Electron Devices
2022-07 | Journal article
Contributors: Woorham Bae; Jin-Woo Han; Kyung Jean Yoon
Source: check_circle
Crossref

An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET

IEEE Journal of Solid-State Circuits
2022-01 | Journal article
Contributors: Colin Schmidt; John Wright; Zhongkai Wang; Eric Chang; Albert Ou; Woorham Bae; Sean Huang; Vladimir Milovanovic; Anita Flynn; Brian Richards et al.
Source: check_circle
Crossref

Design and Analysis of Asynchronous Sampling Duty Cycle Corrector

Electronics
2021-10-24 | Journal article
Contributors: Gijin Park; Jaeduk Han; Woorham Bae
Source: check_circle
Crossref

LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies

IEEE Transactions on Circuits and Systems I: Regular Papers
2021-03 | Journal article
Contributors: Jaeduk Han; Woorham Bae; Eric Chang; Zhongkai Wang; Borivoje Nikolic; Elad Alon
Source: check_circle
Crossref

Today’s computing challenges: opportunities for computer hardware design

PeerJ Computer Science
2021-03-30 | Journal article
Contributors: Woorham Bae
Source: check_circle
Crossref

A 1.93-pJ/Bit PCI Express Gen4 PHY Transmitter with On-Chip Supply Regulators in 28 nm CMOS

Electronics
2021-01-02 | Journal article
Contributors: Woorham Bae; Sung-Yong Cho; Deog-Kyoon Jeong
Source: check_circle
Crossref
grade
Preferred source (of 2)‎

Comprehensive Read Margin and BER Analysis of One Selector-One Memristor Crossbar Array Considering Thermal Noise of Memristor With Noise-Aware Device Model

IEEE Transactions on Nanotechnology
2020 | Journal article
Contributors: Woorham Bae; Kyung Jean Yoon
Source: check_circle
Crossref

A Novel Stateful Logic Device and Circuit for In‐Memory Parity Programming in Crossbar Memory

Advanced Electronic Materials
2020-12 | Journal article
Contributors: Kyung Jean Yoon; Jin‐Woo Han; Woorham Bae
Source: check_circle
Crossref

Supply-Scalable High-Speed I/O Interfaces

Electronics
2020-08-15 | Journal article
Contributors: Woorham Bae
Source: check_circle
Crossref
grade
Preferred source (of 2)‎

Weight Update Generation Circuit Utilizing Phase Noise of Integrated Complementary Metal–Oxide–Semiconductor Ring Oscillator for Memristor Crossbar Array Neural Network‐Based Stochastic Learning

Advanced Intelligent Systems
2020-05 | Journal article
Contributors: Woorham Bae; Kyung Jean Yoon
Source: check_circle
Crossref

Reference Spur Reduction Techniques for a Phase-Locked Loop

IEEE Access
2019 | Journal article
Contributors: Han-Gon Ko; Woorham Bae; Gyu-Seob Jeong; Deog-Kyoon Jeong
Source: check_circle
Crossref

CMOS Inverter as Analog Circuit: An Overview

Journal of Low Power Electronics and Applications
2019-08-20 | Journal article
Contributors: Woorham Bae
Source: check_circle
Crossref
grade
Preferred source (of 2)‎

A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET

IEEE Journal of Solid-State Circuits
2019-07 | Journal article
Contributors: Angie Wang; Woorham Bae; Jaeduk Han; Stevo Bailey; Orhan Ocal; Paul Rigge; Zhongkai Wang; Kannan Ramchandran; Elad Alon; Borivoje Nikolic
Source: check_circle
Crossref

A Variation-Tolerant, Sneak-Current-Compensated Readout Scheme for Cross-Point Memory Based on Two-Port Sensing Technique

IEEE Transactions on Circuits and Systems II: Express Briefs
2018-12 | Journal article
Contributors: Woorham Bae; Kyung Jean Yoon; Taeksang Song; Borivoje Nikolic
Source: check_circle
Crossref

A 6.7–11.2 Gb/s, 2.25 pJ/bit, Single-Loop Referenceless CDR With Multi-Phase, Oversampling PFD in 65-nm CMOS

IEEE Journal of Solid-State Circuits
2018-10 | Journal article
Contributors: Kwanseo Park; Woorham Bae; Jinhyung Lee; Jeongho Hwang; Deog-Kyoon Jeong
Source: check_circle
Crossref

A 2.5–5.6 GHz Subharmonically Injection-Locked All-Digital PLL With Dual-Edge Complementary Switched Injection

IEEE Transactions on Circuits and Systems I: Regular Papers
2018-09 | Journal article
Contributors: Sung-Yong Cho; Sungwoo Kim; Min-Seong Choo; Han-Gon Ko; Jinhyung Lee; Woorham Bae; Deog-Kyoon Jeong
Source: check_circle
Crossref

A 32 Gb/s, 201 mW, MZM/EAM Cascode Push–Pull CML Driver in 65 nm CMOS

IEEE Transactions on Circuits and Systems II: Express Briefs
2018-04 | Journal article
Contributors: Jeongho Hwang; Gyu-Seob Jeong; Woorham Bae; Jun-Eun Park; Chang Soo Yoon; Jung Min Yoon; Jiho Joo; Gyungock Kim; Deog-Kyoon Jeong
Source: check_circle
Crossref

A 28 Gb/s 1.6 pJ/b PAM-4 Transmitter Using Fractionally Spaced 3-Tap FFE and $G_{m}$ -Regulated Resistive-Feedback Driver

IEEE Transactions on Circuits and Systems II: Express Briefs
2017-12 | Journal article
Contributors: Haram Ju; Moon-Chul Choi; Gyu-Seob Jeong; Woorham Bae; Deog-Kyoon Jeong
Source: check_circle
Crossref

Use of Phase Delay Analysis for Evaluating Wideband Circuits: An Alternative to Group Delay Analysis

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2017-12 | Journal article
Contributors: Woorham Bae; Borivoje Nikolic; Deog-Kyoon Jeong
Source: check_circle
Crossref

Frequency acquisition technique for injection‐locked clock generator using asynchronous‐sampling frequency detection

Electronics Letters
2017-08 | Journal article
Contributors: W. Bae
Source: check_circle
Crossref

Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection

Sensors
2017-08 | Journal article
Source: check_circle
Multidisciplinary Digital Publishing Institute
grade
Preferred source (of 2)‎

Extension of Two-Port Sneak Current Cancellation Scheme to 3-D Vertical RRAM Crossbar Array

IEEE Transactions on Electron Devices
2017-04 | Journal article
Contributors: Woorham Bae; Kyung Jean Yoon; Cheol Seong Hwang; Deog-Kyoon Jeong
Source: check_circle
Crossref

A 0.36 pJ/bit, 0.025 mm[Formula: see text], 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology

IEEE Transactions on Circuits and Systems I: Regular Papers
2016 | Journal article
EID:

2-s2.0-84981727599

Contributors: Bae, W.; Jeong, G.; Park, K.; Cho, S.; Kim, Y.; Jeong, D.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 20 Gb/s 0.4 pJ/b energy-efficient transmitter driver architecture utilizing constant Gm

2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings
2016 | Conference paper
EID:

2-s2.0-84963829036

Contributors: Jeong, G.-S.; Chu, S.-H.; Kim, Y.; Jang, S.; Kim, S.; Bae, W.; Cho, S.-Y.; Ju, H.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 20 Gb/s 0.4 pJ/b Energy-Efficient Transmitter Driver Utilizing Constant-Gm Bias

IEEE Journal of Solid-State Circuits
2016 | Journal article
EID:

2-s2.0-84979085017

Contributors: Jeong, G.; Chu, S.; Kim, Y.; Jang, S.; Kim, S.; Bae, W.; Cho, S.; Ju, H.; Jeong, D.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOS

2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings
2016 | Conference paper
EID:

2-s2.0-84963828731

Contributors: Bae, W.; Ju, H.; Park, K.; Cho, S.-Y.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 7.6 mW, 414 fs RMS-Jitter 10 GHz Phase-Locked Loop for a 40 Gb/s Serial Link Transmitter Based on a Two-Stage Ring Oscillator in 65 nm CMOS

IEEE Journal of Solid-State Circuits
2016 | Journal article
EID:

2-s2.0-84976473524

Contributors: Bae, W.; Ju, H.; Park, K.; Cho, S.; Jeong, D.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 800-Mb/s 0.89-pJ/b reference-less optical receiver with pulse-position-modulation scheme

Proceedings - IEEE International Symposium on Circuits and Systems
2016 | Conference paper
EID:

2-s2.0-84983387276

Contributors: Ju, H.; Bae, W.; Jeong, G.-S.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A crossbar resistance switching memory readout scheme with sneak current cancellation based on a two-port current-mode sensing

Nanotechnology
2016 | Journal article
EID:

2-s2.0-84994887839

Contributors: Bae, W.; Yoon, K.J.; Hwang, C.S.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A fully integrated 1-pJ/bit 10-Gb/s/ch forwarded-clock transmitter with a resistive feedback inverter based driver in 65-nm CMOS

Proceedings - IEEE International Symposium on Circuits and Systems
2016 | Conference paper
EID:

2-s2.0-84983395426

Contributors: Bae, W.; Jeong, G.-S.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

Comprehensive Writing Margin Analysis and its Application to Stacked one Diode-One Memory Device for High-Density Crossbar Resistance Switching Random Access Memory

Advanced Electronic Materials
2016 | Journal article
EID:

2-s2.0-84987905519

Contributors: Yoon, K.J.; Bae, W.; Jeong, D.-K.; Hwang, C.S.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

Design of Silicon Photonic Interconnect ICs in 65-nm CMOS Technology

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2016 | Journal article
EID:

2-s2.0-84951335078

Contributors: Bae, W.; Jeong, G.-S.; Kim, Y.; Chi, H.-K.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

Test of the VCSEL driver based on Verilog-A VCSEL model

ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)
2016 | Conference paper
EID:

2-s2.0-84963812781

Contributors: Hwang, J.; Jeong, G.-S.; Bae, W.; Kim, Y.; Kim, G.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 1-pJ/bit, 10-Gb/s/ch Forwarded-Clock Transmitter Using a Resistive Feedback Inverter-Based Driver in 65-nm CMOS

IEEE Transactions on Circuits and Systems II: Express Briefs
2016-12 | Journal article
Contributors: Woorham Bae; Gyu-Seob Jeong; Deog-Kyoon Jeong
Source: check_circle
Crossref

A 10 Gb/s hybrid PLL-based forwarded clock receiver in 65-nm CMOS

Proceedings - IEEE International Symposium on Circuits and Systems
2015 | Conference paper
EID:

2-s2.0-84946219397

Contributors: Park, K.; Bae, W.; Ju, H.; Lee, J.; Jeong, G.-S.; Kim, Y.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 22 to 26.5 Gb/s Optical Receiver with All-Digital Clock and Data Recovery in a 65 nm CMOS Process

IEEE Journal of Solid-State Circuits
2015 | Journal article
EID:

2-s2.0-84947036783

Contributors: Chu, S.-H.; Bae, W.; Jeong, G.-S.; Jang, S.; Kim, S.; Joo, J.; Kim, G.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 26.5 Gb/s optical receiver with all-digital clock and data recovery in 65nm CMOS process

Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014
2015 | Conference paper
EID:

2-s2.0-84922551832

Contributors: Chu, S.-H.; Bae, W.; Jeong, G.-S.; Joo, J.; Kim, G.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 5-GHz subharmonically injection-locked all-digital PLL with complementary switched injection

European Solid-State Circuits Conference
2015 | Conference paper
EID:

2-s2.0-84958769119

Contributors: Cho, S.-Y.; Kim, S.; Choo, M.-S.; Lee, J.; Ko, H.-G.; Jang, S.; Chu, S.-H.; Bae, W.; Kim, Y.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A low-power pulse position modulation transceiver

Proceedings - IEEE International Symposium on Circuits and Systems
2015 | Conference paper
EID:

2-s2.0-84946215317

Contributors: Bae, W.; Yoon, C.-S.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A power-efficient 600-mV<inf>pp</inf> voltage-mode driver with independently matched pull-up and pull-down impedances

International Journal of Circuit Theory and Applications
2015 | Journal article
EID:

2-s2.0-84957809712

Contributors: Bae, W.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 0.36 pJ/bit, 12.5 Gb/s forwarded-clock receiver with a sample swapping scheme and a half-bit delay line

European Solid-State Circuits Conference
2014 | Conference paper
EID:

2-s2.0-84909952253

Contributors: Bae, W.; Jeong, G.-S.; Park, K.; Cho, S.-Y.; Kim, Y.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A 10-Gb/s 6-Vpp differential modulator driver in 65-nm CMOS

Proceedings - IEEE International Symposium on Circuits and Systems
2014 | Conference paper
EID:

2-s2.0-84907398396

Contributors: Kim, Y.; Bae, W.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A design of an area-efficient 10-GHz phase-locked loop for source-synchronous, multi-channel links in 90-nm CMOS technology

Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2014
2014 | Conference paper
EID:

2-s2.0-84938796697

Contributors: Bae, W.; Jeong, D.-K.; Yoo, B.-J.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A PVT-compensated 2.2 to 3.0 GHz digitally controlled oscillator for All-digital PLL

Journal of Semiconductor Technology and Science
2014 | Journal article
EID:

2-s2.0-84906883466

Contributors: Kavala, A.; Bae, W.; Kim, S.; Hong, G.-M.; Chi, H.; Kim, S.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A study on using pulse generators to design a ring-VCO based bang-bang PLL/CDR with a consistent loop bandwidth

13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings
2014 | Conference paper
EID:

2-s2.0-84910051359

Contributors: Bae, W.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

Linearization technique for binary phase detectors in a collaborative timing recovery circuit

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2014 | Journal article
EID:

2-s2.0-84901589295

Contributors: Yoo, B.-J.; Bae, W.-R.; Han, J.; Kim, J.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

A highly expandable forwarded-clock receiver with ultra-slim data lane using skew calibration by multi-phase edge monitoring

Journal of Semiconductor Technology and Science
2012 | Journal article
EID:

2-s2.0-84874606429

Contributors: Yoo, B.-J.; Song, H.-Y.; Chi, H.-K.; Bae, W.-R.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

Design of CMOS 5 Gb/s 4-PAM transceiver frontend for low-power memory interface

ISOCC 2012 - 2012 International SoC Design Conference
2012 | Conference paper
EID:

2-s2.0-84873954789

Contributors: Bae, W.; Yoo, B.-J.; Jeong, D.-K.
Source: Self-asserted source
Woorham Bae via Scopus - Elsevier

Peer review (3 reviews for 3 publications/grants)

Review activity for Advanced intelligent systems. (1)
Review activity for Electronics. (1)
Review activity for Micromachines. (1)