Personal information

Other IDs

Scopus Author ID: 56341867600

Keywords

ESD, Power Devices, TVS

Countries

China

Activities

Collapse all

Employment (1)

Taiwan Semiconductor Manufacturing Company: Shanghai, Shanghai, CN

2013-02-19 to present | Device Engineer (R&D)
Employment
Source: Self-asserted source
Jian Wu

Education and qualifications (1)

Zhejiang University: Hangzhou, Zhejiang, CN

2010-09-01 to 2013-03-31 | Master (ISEE)
Education
Source: Self-asserted source
Jian Wu

Works (13)

An improved GGNMOS triggered SCR for high holding voltage ESD protection applications

Chinese Physics B
2015 | Journal article
DOI: 10.1088/1674-1056/24/10/108502
EID:

2-s2.0-84947768236
Contributors: Zhang, S.; Dong, S.-R.; Wu, X.-J.; Zeng, J.; Zhong, L.; Wu, J.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

300-V class power n-channel LDMOS transistor implemented in 0.18-μm silicon-on-insulator (SOI) technology

Microelectronics Reliability
2015-11 | Journal article
DOI: 10.1016/j.microrel.2015.11.004
Source: check_circle
Crossref
grade
Preferred source (of 2)‎

A modified LDMOS device with improved ESD protection performance

IEEJ Transactions on Electrical and Electronic Engineering
2014 | Journal article
DOI: 10.1002/tee.22030
EID:

2-s2.0-84906720946
Contributors: Liang, H.; Gu, X.; Xiao, S.; Dong, S.; Wu, J.; Zhong, L.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

Investigation of the trigger voltage walk-in effect in LDMOS for high-voltage ESD protection

Journal of Semiconductors
2014 | Journal article
DOI: 10.1088/1674-4926/35/9/094005
EID:

2-s2.0-84929631211
Contributors: Liang, H.; Dong, S.; Gu, X.; Zhong, L.; Wu, J.; Yu, Z.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

A novel straight through-MOS-triggered SCR for on-chip ESD protection

Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics
2013 | Journal article
EID:

2-s2.0-84880467047
Contributors: Zheng, J.; Ma, F.; Han, Y.; Liang, H.; Dong, S.; Wu, J.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

A novel gate-suppression technique for ESD protection

Microelectronics Reliability
2012 | Journal article
DOI: 10.1016/j.microrel.2011.09.025
EID:

2-s2.0-84863724927
Contributors: Miao, M.; Dong, S.; Li, M.; Wu, J.; Ma, F.; Zheng, J.; Han, Y.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

A novel power-clamp assisted complementary MOSFET for robust ESD protection

Microelectronics Reliability
2012 | Journal article
DOI: 10.1016/j.microrel.2011.10.013
EID:

2-s2.0-84863719788
Contributors: Wu, J.; Dong, S.; Li, M.; Miao, M.; Ma, F.; Zheng, J.; Han, Y.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

High-holding-voltage silicon-controlled rectifier for ESD applications

IEEE Electron Device Letters
2012 | Journal article
DOI: 10.1109/LED.2012.2208934
EID:

2-s2.0-84866946905
Contributors: Dong, S.; Wu, J.; Miao, M.; Zeng, J.; Han, Y.; Liou, J.J.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

Investigation of ESD protection strategy in high voltage Bipolar-CMOS-DMOS process

Microelectronics Reliability
2012 | Journal article
DOI: 10.1016/j.microrel.2011.11.011
EID:

2-s2.0-84863715627
Contributors: Ma, F.; Han, Y.; Dong, S.; Miao, M.; Zheng, J.; Wu, J.; Han, C.-G.; Zhu, K.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

Lateral IGBT in thin SOI process for high voltage ESD application

2012 IEEE International Conference on Electron Devices and Solid State Circuit, EDSSC 2012
2012 | Conference paper
DOI: 10.1109/EDSSC.2012.6482784
EID:

2-s2.0-84875722451
Contributors: Wu, J.; Dong, S.; Han, Y.; Zeng, J.; Ma, F.; Zheng, J.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

Minimizing multiple triggering effect in diode-triggered silicon-controlled rectifiers for ESD protection applications

IEEE Electron Device Letters
2012 | Journal article
DOI: 10.1109/LED.2012.2191930
EID:

2-s2.0-84861703077
Contributors: Miao, M.; Dong, S.; Wu, J.; Zeng, J.; Liou, J.J.; Ma, F.; Li, H.; Han, Y.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

Novel capacitance coupling complementary dual-direction SCR for high-voltage ESD

IEEE Electron Device Letters
2012 | Journal article
DOI: 10.1109/LED.2012.2188015
EID:

2-s2.0-84862817574
Contributors: Dong, S.; Jin, H.; Miao, M.; Wu, J.; Liou, J.J.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier

Substrate-engineered GGNMOS for low trigger voltage ESD in 65 nm CMOS process

Microelectronics Reliability
2011 | Journal article
DOI: 10.1016/j.microrel.2011.07.028
EID:

2-s2.0-81855161601
Contributors: Ma, F.; Han, Y.; Song, B.; Dong, S.; Miao, M.; Zheng, J.; Wu, J.; Zhu, K.
Source: Self-asserted source
Jian Wu via Scopus - Elsevier
How many people are using ORCID?