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Biography

I completed my M. Tech. from IIIT Bhubaneshwar and after that, I worked at Infosys Ltd. as a system engineer for two years.
To pursue my research interest I moved to academics and taught at VNIT Nagpur and NIT Raipur as an assistant professor(contract).
Following this I enrolled in the Ph.D. program at IIIT Naya Raipur. During my Ph.D. my work is focused on efficient hardware implementation of security protocols specifically public key cryptography.
My current area of interest is post-quantum cryptography, and providing efficient and secure hardware implementation of the same.
Currently, I am working as a research associate at C.R. Rao AIMSCS Hyderabad. Here my main role is to perform the security analysis of PQC algorithms and efficient implementation of the same.

Activities

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Employment (2)

CR Rao Advanced Institute of Mathematics, Statistics and Computer Science: Hyderabad, telangana, IN

2022-06-03 to present | research associate (computer science and engineering)
Employment
Source: Self-asserted source
Utkarsh Tiwari

International Institute of Information Technology: RAIPUR, chhattisgarh, IN

2019-07-04 to present | research scholar (computer science and engineering)
Employment
Source: Self-asserted source
Utkarsh Tiwari

Education and qualifications (2)

International Institute of Information Technology: RAIPUR, chhattisgarh, IN

2020-01-02 to present | PhD (computer science and engineering)
Education
Source: Self-asserted source
Utkarsh Tiwari

International Institute of Information Technology: Bhubaneswar, orrisa, IN

2013-07-01 to 2015-05-15 | M.Tech (computer science and engineering)
Education
Source: Self-asserted source
Utkarsh Tiwari

Professional activities (1)

ISWTA 2023: Kuala Lampur, Malaysia, MY

2023-08-15 | Best Paper Award
Distinction
Source: Self-asserted source
Utkarsh Tiwari

Works (6)

A system of crypto-processor for prevention of insider attack

IPO
2023-09-19 | Patent
Contributors: Utkarsh Tiwari
Source: Self-asserted source
Utkarsh Tiwari

Improving the Verification Step of Wesolowski’s Verifiable Delay Function using efficient Double Modular Exponentiation

2023 IEEE Symposium on Wireless Technology & Applications (ISWTA)
2023-08-15 | Conference paper
DOI: 10.1109/iswta58588.2023.10249890
Contributors: Utkarsh Tiwari; Satyanarayana Vollala
Source: Self-asserted source
Utkarsh Tiwari

Improving the performance of authentication protocols using efficient modular multi exponential technique

Multimedia Tools and Applications
2023-06-27 | Journal article
DOI: 10.1007/s11042-023-15726-x
Part of ISSN: 1380-7501
Part of ISSN: 1573-7721
Contributors: Utkarsh Tiwari; Satyanarayana Vollala; Ramasubramanian N; Shameedha Begum
Source: Self-asserted source
Utkarsh Tiwari

Efficient hardware realization and high radix implementation of modular multi exponential techniques for public key cryptography

Microelectronics Journal
2022-10 | Journal article
DOI: 10.1016/j.mejo.2022.105548
Part of ISSN: 0026-2692
Contributors: Utkarsh Tiwari; Satyanarayana Vollala; N. Ramasubramanian; B. Shameedha Begum
Source: Self-asserted source
Utkarsh Tiwari

Secure and Energy Efficient Design of Multi-Modular Exponential Techniques for Public-Key Cryptosystem

Journal of Communications and Information Networks
2022-09 | Journal article
DOI: 10.23919/jcin.2022.9906944
Part of ISSN: 2096-1081
Part of ISSN: 2509-3312
Contributors: Utkarsh Tiwari; Satyanarayana Vollala; N. Ramasubramanian; B. Sameedha Begum; G. Lakshminarayanan
Source: Self-asserted source
Utkarsh Tiwari

Energy-Efficient Modular Exponential Techniques for Public-Key Cryptography

Springer International Publishing
2021 | Book
DOI: 10.1007/978-3-030-74524-0
ISBN: 9783030745233
ISBN: 9783030745240
Contributors: Satyanarayana Vollala; N. Ramasubramanian; Utkarsh Tiwari
Source: Self-asserted source
Utkarsh Tiwari
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