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Scopus Author ID: 36617974100

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Employment (3)

B. M. S. College of Engineering: Bengaluru, Karnataka, IN

2019-01-02 to present | Assistant Professor (Electronics and Communication Engineering)
Employment
Source: Self-asserted source
Rajath Vasudevamurthy

Amrita School of Engineering: Bengaluru, Karnataka, IN

2017-01-02 to 2018-11-30 | Assistant Professor (Electronics and Communication Engineering)
Employment
Source: Self-asserted source
Rajath Vasudevamurthy

Pennsylvania State University: University Park, PA, US

2014-06-15 to 2015-06-14 | Post-doctoral Researcher (Computer Science and Engineering)
Employment
Source: Self-asserted source
Rajath Vasudevamurthy

Education and qualifications (2)

Indian Institute of Science: Bengaluru, Karnataka, IN

2007-08-01 to 2013-07-31 | Ph. D. (Electrical Communication Engineering)
Education
Source: Self-asserted source
Rajath Vasudevamurthy

R. V. College of Engineering: Bengaluru, Karnataka, IN

2003-09-22 to 2007-06-08 | B. E. (Electronics and Communication Engineering)
Education
Source: Self-asserted source
Rajath Vasudevamurthy

Professional activities (1)

KTH Royal Institute of Technology: Stockholm, SE

2013-08-06 to 2014-03-07 | Visiting Researcher (Signal Behandling)
Invited position
Source: Self-asserted source
Rajath Vasudevamurthy

Works (4)

Time-based all-digital technique for analog built-in self-test

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2014 | Journal article
DOI: 10.1109/TVLSI.2013.2242909
EID:

2-s2.0-84895065702
Contributors: Vasudevamurthy, R.; Das, P.K.; Amrutur, B.
Source: Self-asserted source
Rajath Vasudevamurthy via Scopus - Elsevier

Multiphase technique to speed-up delay measurement via sub-sampling

Proceedings of the IEEE International Conference on VLSI Design
2013 | Conference paper
DOI: 10.1109/VLSID.2013.186
EID:

2-s2.0-84875580099
Contributors: Vasudevamurthy, R.; Amrutur, B.
Source: Self-asserted source
Rajath Vasudevamurthy via Scopus - Elsevier

0.84 ps resolution clock skew measurement via subsampling

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2011 | Journal article
DOI: 10.1109/TVLSI.2010.2083706
EID:

2-s2.0-80455128689
Contributors: Amrutur, B.; Das, P.K.; Vasudevamurthy, R.
Source: Self-asserted source
Rajath Vasudevamurthy via Scopus - Elsevier

A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test

Proceedings - IEEE International Symposium on Circuits and Systems
2011 | Conference paper
DOI: 10.1109/ISCAS.2011.5937996
EID:

2-s2.0-79960878481
Contributors: Vasudevamurthy, R.; Das, P.K.; Amrutur, B.
Source: Self-asserted source
Rajath Vasudevamurthy via Scopus - Elsevier

Peer review (2 reviews for 1 publication/grant)

Review activity for Journal of electronic testing. (2)
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