Personal information

No personal information available

Activities

Employment (2)

University of Texas at Dallas: Dallas, TX, US

2020-01-23 to present | Reaserch Assitant (Electrical and Computer Engineering)
Employment
Source: Self-asserted source
V.A. Niranjan

Advantest America Inc: Austin, Tx, US

2019-05 to 2019-12 | Summer Intern - Tech Specialist (Applied Research in Technology)
Employment
Source: Self-asserted source
V.A. Niranjan

Education and qualifications (3)

University of Texas at Dallas: Dallas, TX, US

2020-01-25 to present | Doctor of Philosophy (Electrical and Computer Engineering)
Education
Source: Self-asserted source
V.A. Niranjan

University of Texas at Dallas: Dallas, TX, US

2017-08-02 to 2019-12-15 | Master of Science in Computer Engineering (Electrical and Computer Engineering)
Education
Source: Self-asserted source
V.A. Niranjan

BMS College of Engineering: Bangalore, Karnataka, IN

2013-08-27 to 2017-04-25 | Bachelors of Engineering (Telecommunication)
Education
Source: Self-asserted source
V.A. Niranjan

Works (2)

Machine Learning-Based Overkill Reduction through Inter-Test Correlation

2022 IEEE 40th VLSI Test Symposium (VTS)
2022 | Conference paper
Contributors: Neethirajan, D.; Niranjan, V. A.; Willis, R.; Nahar, A.; Webster, D.; Makris, Y.
Source: Self-asserted source
V.A. Niranjan

Trim Time Reduction in Analog/RF ICs Based on Inter-Trim Correlation

2021 IEEE 39th VLSI Test Symposium (VTS)
2021 | Conference paper
Contributors: Niranjan, V. A.; Neethirajan, D.; Xanthopoulos, C.; Rosa, E. De La; Alleyne, C.; Mier, S.; Makris, Y.
Source: Self-asserted source
V.A. Niranjan