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Works (3)

DCiROM: A Fully Digital Compute-in-ROM Design Approach to High Energy Efficiency of DNN Inference at Task Level

2025-01-20 | Conference paper
DOI: 10.1145/3658617.3697585
Contributors: Tianyi Yu; Tianyu Liao; Mufeng Zhou; Xiaotian Chu; Guodong Yin; Mingyen Lee; Yongpan Liu; Huazhong Yang; Xueqing Li
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Crossref

Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm2 Density in 65-nm CMOS

IEEE Journal of Solid-State Circuits
2024-06 | Journal article
DOI: 10.1109/JSSC.2023.3326955
Contributors: Guodong Yin; Yiming Chen; Mufeng Zhou; Wenjun Tang; Mingyen Lee; Zekun Yang; Tianyu Liao; Xirui Du; Vijaykrishnan Narayanan; Huazhong Yang et al.
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Crossref

Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices

2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)
2023-10-28 | Conference paper
DOI: 10.1109/iccad57390.2023.10323756
Contributors: Juejian Wu; Tianyu Liao; Taixin Li; Yixin Xu; Vijaykrishnan Narayanan; Yongpan Liu; Huazhong Yang; Xueqing Li
Source: Self-asserted source
Tianyu Liao
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